PIC18LF2X Datasheet, PDF (37/44 Pages) Microchip Technology – 28/40/44-Pin, Low-Power, High-Performance Microcontrollers with XLP Technology

PIC18(L)F2X/4XK50
TABLE 5-4: CHECKSUM COMPUTATION (CONTINUED)
Device
Code-
Protect
Checksum
Blank
Value
0xAA at 0
and Max
Address⁽¹⁾
None
SUM[0000:07FF]+SUM[0800:1FFF]+SUM[2000:3FFF]+
SUM[4000:5FFF]+SUM[6000:7FFF]+(CONFIG1L & 3Bh)+
(CONFIG1H & EFh)+(CONFIG2L & 5Fh)+(CONFIG2H & 3Fh)+
(CONFIG3L & 00h)+(CONFIG3H & D3h)+(CONFIG4L & E5h)+
(CONFIG4H & 00h)+(CONFIG5L & 0Fh)+(CONFIG5H & C0h)+
(CONFIG6L & 0Fh)+(CONFIG6H & E0h)+(CONFIG7L & 0Fh)+
(CONFIG7H & 40h)
8428
837E
PIC18FX5K50
PIC18LFX5K50
Boot
Block
SUM[0800:1FFF]+SUM[2000:3FFF]+SUM[4000:5FFF]+SUM[6000:7
FFF]+
(CONFIG1L & 3Bh)+(CONFIG1H & EFh)+(CONFIG2L & 5Fh)+
(CONFIG2H & 3Fh)+(CONFIG3L & 00h)+(CONFIG3H & D3h)+
(CONFIG4L & E5h)+(CONFIG4H & 00h)+(CONFIG5L & 0Fh)+
(CONFIG5H & C0h)+(CONFIG6L & 0Fh)+(CONFIG6H & E0h)+
(CONFIG7L & 0Fh)+(CONFIG7H & 40h)+SUM_ID
8BFE
8BB3
Boot/ SUM[4000:5FFF]+SUM[6000:7FFF]+(CONFIG1L & 3Bh)+
Block 0/ (CONFIG1H & EFh)+(CONFIG2L & 5Fh)+(CONFIG2H & 3Fh)+
Block 1 (CONFIG3L & 00h)+(CONFIG3H & D3h)+(CONFIG4L & E5h)+
(CONFIG4H & 00h)+(CONFIG5L & 0Fh)+(CONFIG5H & C0h)+
(CONFIG6L & 0Fh)+(CONFIG6H & E0h)+(CONFIG7L & 0Fh)+
(CONFIG7H & 40h)+SUM_ID
C3FB
C3B0
All (CONFIG1L & 3Bh)+(CONFIG1H & EFh)+(CONFIG2L & 5Fh)+
(CONFIG2H & 3Fh)+(CONFIG3L & 00h)+(CONFIG3H & D3h)+
(CONFIG4L & E5h)+(CONFIG4H & 00h)+(CONFIG5L & 0Fh)+
(CONFIG5H & C0h)+(CONFIG6L & 0Fh)+(CONFIG6H & E0h)+
(CONFIG7L & 0Fh)+(CONFIG7H & 40h)+SUM_ID
03EF
03F9
Legend:
Item
Description
CONFIGx = Configuration Word
SUM[a:b] = Sum of locations, a to b inclusive
SUM_ID = Byte-wise sum of lower four bits of all customer ID locations
+
= Addition
&
= Bit-wise AND
Note 1: 0xAA at address 0 and 0xFF at address 1 for the beginning of program memory; 0xAA at Max address
and 0xFF at Max address -1 for the end of program memory.
 2012 Microchip Technology Inc.
DS41630B-page 37