PIC24HJ32GP302_12 Datasheet, PDF (383/390 Pages) Microchip Technology – 16-bit Microcontrollers (up to 128 KB Flash and 8K SRAM) with Advanced Analog

PIC24HJ32GP302/304, PIC24HJ64GPX02/X04 AND PIC24HJ128GPX02/X04
Peripheral Module Disable (PMD) .................................... 130
Pinout I/O Descriptions ....................................................... 11
PMD Module
Register Map............................................................... 46
PORTA
Register Map......................................................... 44, 45
PORTB
Register Map............................................................... 45
Power-on Reset (POR) ....................................................... 65
Power-Saving Features .................................................... 129
Clock Frequency and Switching................................ 129
Program Address Space ..................................................... 25
Construction................................................................ 49
Data Access from Program Memory
Using Program Space Visibility........................... 52
Data Access from Program Memory
Using Table Instructions ..................................... 51
Data Access from, Address Generation...................... 50
Memory Map ............................................................... 25
Table Read Instructions
TBLRDH ............................................................. 51
TBLRDL .............................................................. 51
Visibility Operation ...................................................... 52
Program Memory
Interrupt Vector ........................................................... 26
Organization................................................................ 26
Reset Vector ............................................................... 26
R
Reader Response ............................................................. 388
Register Map
CRC ............................................................................ 44
Dual Comparator......................................................... 44
Parallel Master/Slave Port .......................................... 43
Real-Time Clock and Calendar................................... 44
Registers
AD1CHS0 (ADC1 Input Channel 0 Select ................ 238
AD1CHS123 (ADC1 Input Channel 1, 2, 3 Select) ... 237
AD1CON1 (ADC1 Control 1) .................................... 232
AD1CON2 (ADC1 Control 2) .................................... 234
AD1CON3 (ADC1 Control 3) .................................... 235
AD1CON4 (ADC1 Control 4) .................................... 236
AD1CSSL (ADC1 Input Scan Select Low)................ 239
AD1PCFGL (ADC1 Port Configuration Low) ............ 239
CiBUFPNT1 (ECAN Filter 0-3 Buffer Pointer)........... 213
CiBUFPNT2 (ECAN Filter 4-7 Buffer Pointer)........... 214
CiBUFPNT3 (ECAN Filter 8-11 Buffer Pointer)......... 214
CiBUFPNT4 (ECAN Filter 12-15 Buffer Pointer)....... 215
CiCFG1 (ECAN Baud Rate Configuration 1) ............ 211
CiCFG2 (ECAN Baud Rate Configuration 2) ............ 212
CiCTRL1 (ECAN Control 1) ...................................... 204
CiCTRL2 (ECAN Control 2) ...................................... 205
CiEC (ECAN Transmit/Receive Error Count)............ 211
CiFCTRL (ECAN FIFO Control)................................ 207
CiFEN1 (ECAN Acceptance Filter Enable) ............... 213
CiFIFO (ECAN FIFO Status)..................................... 208
CiFMSKSEL1 (ECAN Filter 7-0 Mask Selection)..... 217,
218
CiINTE (ECAN Interrupt Enable) .............................. 210
CiINTF (ECAN Interrupt Flag)................................... 209
CiRXFnEID (ECAN Acceptance Filter n
Extended Identifier)........................................... 217
CiRXFnSID (ECAN Acceptance Filter n
Standard Identifier) ........................................... 216
CiRXFUL1 (ECAN Receive Buffer Full 1) ................. 220
CiRXFUL2 (ECAN Receive Buffer Full 2) ................. 220
CiRXMnEID (ECAN Acceptance Filter Mask n
Extended Identifier) .......................................... 219
CiRXMnSID (ECAN Acceptance Filter Mask n
Standard Identifier) ........................................... 219
CiRXOVF1 (ECAN Receive Buffer Overflow 1)........ 221
CiRXOVF2 (ECAN Receive Buffer Overflow 2)........ 221
CiTRBnSID (ECAN Buffer n Standard Identifier)..... 223,
224, 226
CiTRmnCON (ECAN TX/RX Buffer m Control) ........ 222
CiVEC (ECAN Interrupt Code) ................................. 206
CLKDIV (Clock Divisor) ............................................ 125
CORCON (Core Control)...................................... 22, 74
DMACS0 (DMA Controller Status 0) ........................ 114
DMACS1 (DMA Controller Status 1) ........................ 116
DMAxCNT (DMA Channel x Transfer Count)........... 113
DMAxCON (DMA Channel x Control)....................... 110
DMAxPAD (DMA Channel x Peripheral Address) .... 113
DMAxREQ (DMA Channel x IRQ Select) ................. 111
DMAxSTA (DMA Channel x RAM Start Address A) . 112
DMAxSTB (DMA Channel x RAM Start Address B) . 112
DSADR (Most Recent DMA RAM Address) ............. 117
I2CxCON (I2Cx Control)........................................... 188
I2CxMSK (I2Cx Slave Mode Address Mask)............ 192
I2CxSTAT (I2Cx Status) ........................................... 190
IFS0 (Interrupt Flag Status 0) ............................... 77, 84
IFS1 (Interrupt Flag Status 1) ............................... 79, 86
IFS2 (Interrupt Flag Status 2) ............................... 81, 88
IFS3 (Interrupt Flag Status 3) ............................... 82, 89
IFS4 (Interrupt Flag Status 4) ............................... 83, 90
INTCON1 (Interrupt Control 1) ................................... 75
INTCON2 (Interrupt Control 2) ................................... 76
INTTREG Interrupt Control and Status Register ...... 105
IPC0 (Interrupt Priority Control 0) ............................... 91
IPC1 (Interrupt Priority Control 1) ............................... 92
IPC11 (Interrupt Priority Control 11) ......................... 101
IPC15 (Interrupt Priority Control 15) ......................... 102
IPC16 (Interrupt Priority Control 16) ......................... 103
IPC17 (Interrupt Priority Control 17) ......................... 104
IPC2 (Interrupt Priority Control 2) ............................... 93
IPC3 (Interrupt Priority Control 3) ............................... 94
IPC4 (Interrupt Priority Control 4) ............................... 95
IPC5 (Interrupt Priority Control 5) ............................... 96
IPC6 (Interrupt Priority Control 6) ............................... 97
IPC7 (Interrupt Priority Control 7) ............................... 98
IPC8 (Interrupt Priority Control 8) ............................... 99
IPC9 (Interrupt Priority Control 9) ............................. 100
NVMCON (Flash Memory Control)............................. 55
NVMKEY (Nonvolatile Memory Key) .......................... 56
OCxCON (Output Compare x Control) ..................... 178
OSCCON (Oscillator Control)................................... 123
OSCTUN (FRC Oscillator Tuning)............................ 127
PLLFBD (PLL Feedback Divisor) ............................. 126
PMD1 (Peripheral Module Disable
Control Register 1) ........................................... 132
PMD2 (Peripheral Module Disable
Control Register 2) ........................................... 133
PMD3 (Peripheral Module Disable
Control Register 3) ........................................... 134
RCON (Reset Control)................................................ 61
SPIxCON1 (SPIx Control 1) ..................................... 182
SPIxCON2 (SPIx Control 2) ..................................... 184
SPIxSTAT (SPIx Status and Control) ....................... 181
SR (CPU Status) .................................................. 21, 74
T1CON (Timer1 Control) .......................................... 163
TCxCON (Input Capture x Control) .......................... 173
TxCON (Type B Time Base Control) ........................ 168
TyCON (Type C Time Base Control)........................ 169
UxMODE (UARTx Mode) ......................................... 195
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DS70293G-page 383