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MIC24045 Datasheet, PDF (34/46 Pages) Microchip Technology – I2C Programmable, 4.5V-19V Input, 5A Step-Down Converter
MIC24045
8.0 I2C INTERFACE DESCRIPTION
The I2C bus is for 2-way, 2-line communication
between different ICs or modules. The two lines are: a
serial data line (SDA) and a serial clock line (SCL).
Both lines must be connected to a positive supply via a
pull-up resistor. Data transfer may be initiated only
when the bus is not busy. MIC24045 is a slave-only
device (i.e., it cannot generate a SCL signal and does
not have SCL clock stretching capability). Every data
transfer to and from the MIC24045 must be initiated by
a master device which drives the SCL line.
The MIC24045 is a Fast mode device, supporting data
transfers at up to 400 Kbit/s.
The MIC24045 device assumes that the I2C logic levels
on the bus are generated by a device operating from a
nominal supply voltage of 3.3V (with +/-10% tolerance).
Therefore, VIH and VIL are not related to the VDDA value
of the MIC24045. The SDA and SCL lines must not be
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SDA
SCL
FIGURE 8-1:
Data line stable;
data valid
Bit Transfer.
Change of data
allowed
8.1 Bit Transfer
One data bit is transferred during each clock pulse. The
data on the SDA line must remain stable during the
HIGH period of the clock pulse as changes in the data
line at this time will be interpreted as control signals.
8.2 START and STOP Conditions
Both data and clock lines remain HIGH when the bus is
not busy. A HIGH-to-LOW transition of the data line
while the clock is HIGH is defined as the START (S) or
repeated START (Sr) condition. A LOW-to-HIGH tran-
sition of the data line while the clock is HIGH is defined
as the STOP condition (P). START and STOP condi-
tions are always generated by the master. The bus is
considered to be busy after the START condition. The
bus is considered to be free again a certain time after
the STOP condition. The bus stays busy if a repeated
START (Sr) is generated instead of a STOP condition.
SDA
SCL
FIGURE 8-2:
S
START condition
START and STOP Conditions.
DS20005568A-page 34
SDA
P
SCL
STOP condition
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