MIC24045 Datasheet, PDF (18/46 Pages) Microchip Technology – I2C Programmable, 4.5V-19V Input, 5A Step-Down Converter

MIC24045
4.0 FUNCTIONAL DESCRIPTION
The MIC24045 is a digitally programmable, 5A valley
current-mode controlled regulator featuring an input
voltage range from 4.5V to 19V.
Programmability is achieved by means of an
I²C-compatible serial digital interface, which can support
Serial Clock (SCL) rates up to 400 kHz (Fast mode).
The MIC24045 requires a minimal amount of external
components. Only the inductor, supply decoupling
capacitors and compensation network are external.
The flexibility in the external compensation design
allows the user to optimize their design across the
entire range of operating parameters such as input
voltage, output voltage, switching frequency and load
current.
4.1 Theory of Operation
Valley current-mode control is a fixed-frequency,
leading-edge-modulated PWM current-mode control.
Differing from Peak Current mode, in valley
current-mode the clock marks the turn-off of the
high-side switch. Upon this instant, the MIC24045
low-side switch current level is compared against the
reference current signal from the error amplifier. When
the falling low-side switch current signal drops below
the current reference signal, the high-side switch is
turned on. As a result, the inductor valley current is
regulated to a level dictated by the output of the error
amplifier.
As shown in Section 7.7 “Compensation Design”,
the feedback loop includes an internal programmable
reference (REF_DAC) and an output voltage sensing
attenuator (R2/R1), which removes the need for exter-
nal feedback components and improves regulation
accuracy. Output voltage feedback is achieved by con-
necting OUTSNS directly to the output. The high-per-
formance transconductance error amplifier drives an
external compensation network at the COMP pin. The
COMP pin voltage represents the reference current
signal. The COMP pin voltage is fed to the valley cur-
rent-mode modulator, which also adds slope compen-
sation to ensure current-loop stability. Valley
current-mode control requires slope compensation at
duty cycles less than 50% for current-loop stability. The
slope compensation circuit is internal and it is automat-
ically adapted in amplitude depending upon the fre-
quency, output voltage range and voltage differential
(V_IN - V_OUTSNS). The internal low-R_DS(ON) power
MOSFETs, the associated adaptive gate driver and the
internal bootstrap diode complete the power train.
Overcurrent protection and thermal shutdown protect
the MIC24045 from faults or abnormal operating
conditions.
4.2 Internal LDO, Supply Rails (V_IN,
V_INLDO, V_DDA, V_DDP)
V_IN pins represent the power train input. These pins are
the drain connection of the internal high-side MOSFET
and should be bypassed to P_GND with a X5R or X7R
10 µF (minimum) ceramic capacitor, placed as close as
possible to the device. A combination of ceramic
capacitors of different sizes is recommended.
An internal LDO (biased through V_INLDO pin) provides
a clean supply (5.1V typical) for the analog circuits and
the I²C interface at pin V_DDA. The internal LDO is typi-
cally powered from the same power rail feed at V_IN;
however, V_INLDO can also be higher or lower than V_IN
and can be connected to any other voltage within its
recommended limits. V_INLDO and V_DDA should be
locally bypassed (see Section 3.0 “Pin Description”).
A small series resistor (typically 2-10) can be used
in combination with the V_INLDO bypass capacitor to
implement a RC filter for suppression of large high-fre-
quency switching noise.
The internal LDO is always enabled and regulation
takes place as soon as enough voltage has established
between the V_INLDO and V_DDA pins. If an external
5V±10% is available, it is possible to bypass the inter-
nal LDO by connecting V_INLDO, V_DDA and V_DDP
together at the external 5V rail, thus improving overall
efficiency.
The MIC24045 does not require a separate supply for
the I²C interface and for the internal logic registers,
which are all powered from the V_DDA rail. An internal
Undervoltage Lock-Out circuit (UVLO) monitors the
level of V_DDA and resets the interface and the internal
registers if the V_DDA voltage is below the UVLO
threshold.
V_DDP is the power supply rail for the gate drivers and
bootstrap circuit. This pin is subject to high-current spike
with high-frequency content. To prevent these from pol-
luting the analog V_DDA supply, a separate capacitor is
needed for V_DDP pin bypassing. An internal 10 resistor
is provided between pins V_DDA and V_DDP, allowing a
switching noise attenuation RC filter with the minimum
amount of external components to be implemented. It is
possible, although typically not necessary, to lower the
RC time constant by connecting an external resistor
between pins V_DDA and V_DDP.
DS20005568A-page 18
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