MIC24045 Datasheet, PDF (31/46 Pages) Microchip Technology – I2C Programmable, 4.5V-19V Input, 5A Step-Down Converter

The RMS current I_IN,RMS of the input capacitor is
estimated as in Equation 7-12:
EQUATION 7-12:
I_{IN, RMS} = I_OUT  D  1 – D
Note that, for a given output current I_OUT, the
worst-case values are obtained at D = 0.5.
Multiple input capacitors can be used to reduce input
ripple amplitude and/or individual capacitor RMS
current.
MIC24045
7.7 Compensation Design
As a simple first-order approximation, the valley cur-
rent-mode controlled buck power stage can be mod-
eled as a voltage-controlled current-source feeding the
output capacitor and the load. The inductor current
state-variable is removed and the power-stage transfer
function from COMP to the inductor current is modeled
as a transconductance (Gm_PS). The simplified model of
the control loop is shown in Figure 7-2. The
power-stage transconductance Gm_PS shows some
dependence on current levels and it is also somewhat
affected by process variations, therefore some design
margin is recommended against the typical value
Gm_PS = 12.5A/V (see Electrical Characteristics).
V_IN
Gm_PS
I_L V_OUT
R2
Gm Error
C_OUT
Amplifier
R_L
V_C COMP
ESR
REF_DAC
Gm_EA
R1
V_OUT Range
C_C1
R_C1
C_C2
FIGURE 7-2:
Simplified Small-Signal Model of the Voltage Regulation Loop.
This simplified approach disregards all issues related
to the inner current loop, like its stability and bandwidth.
This approximation is good enough for most operating
scenarios, where the voltage-loop bandwidth is not
pushed to aggressively high frequencies.
Based on the model shown in Figure 7-2, the
control-to-output transfer function is:
EQUATION 7-13:
G_{COS}
where:
=
V----_{O----U----T-----S--}
V_{CS}
=
Gm_P
S

R
L

-^---1----+------2-------^--------s--^---------f-----^z-^--


1
+
2----^----s-^----f--_p^{-}
The MIC24045 uses a transconductance
(Gm_EA = 1.4 mA/V) error amplifier. Frequency
compensation is implemented with a Type-II network
(R_C1, C_C1 and C_C2) connected from COMP to A_GND.
The compensator transfer function consists of an
integrator for zero DC voltage regulation error, a zero to
boost the phase margin of the overall loop gain around
the crossover frequency and an additional pole that can
be used to cancel the output capacitor ESR zero, or to
further attenuate switching frequency ripple. In both
cases, the additional pole makes the regulation loop
less susceptible to switching frequency noise. The
additional pole is created by capacitor C_C2.
Equation 7-14 details the compensator transfer
function H_C(S) (from OUTSNS to COMP).
f_Z, f_P = The frequencies associated with the output
capacitor ESR zero and with the load pole,
respectively:
f_Z = -2---_-----_----C-----_O---1_U----_T----_-----E----S---R---
f_P = -2---_-----_-----_C----_O---_U----_T----_-1----_---_E----_S---_R-----+-----_R----_L---_
EQUATION 7-14:
H_{CS} = –_{R-----1---R-+---1---R----2-}  Gm_EA  -S----_-----_--C----_C----1₁----+-----C-----_C---₂---_
X _---1-----+----1-S---+--_----S-R----^_C---₁-R---_-^C----¹_-CC-------^_-CC------₁--₁^C------+--_-^C_-------¹_{C--C-------C-C}------₂-_{2---}-
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DS20005568A-page 31