MIC24045 Datasheet, PDF (26/46 Pages) Microchip Technology – I2C Programmable, 4.5V-19V Input, 5A Step-Down Converter

MIC24045
REGISTER 5-4: VOUT – VOUT REGISTER (ADDRESS 3h)
RW-V
VOUT7
bit 7
RW-V
VOUT6
RW-V
VOUT5
RW-V
VOUT4
RW-V
VOUT3
RW-V
VOUT2
RW-V
VOUT1
RW-V
VOUT0
bit 0
Legend:
R = Readable bit
-n = Value at POR
RC = Read-then-clear bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set
‘0’ = Bit is cleared
V = factory-programmed POR value⁽¹⁾
x = Bit is unknown
bit 7-0
VOUT<7:0>: VOUT register bits can be changed at any time during power delivery, provided that tran-
sitions from one code to another:
• are done step-by-step, by small VOUT increments. The speed of the transition is left to the user
and limited by the I²C writing interface speed.
• code transition shall take place only within the same VOUT Range. Crossing boundaries of
resolution ranges may cause VOUT glitches and it is not recommended.
See VOUT selection in table below:
VOUT Range Step Size Codes-decimal (hex)
0.640V to 1.280V 5 mV 0 (00h) to 128 (80h)
1.290V to 1.950V 10 mV 129 (81h) to 195 (C3h)
1.980V to 3.420V 30 mV 196 (C4h) to 244 (F4h)
4.750V to 5.250V 50 mV 245 (F5h) to 255 (FFh)
Note 1:
2:
Default Status settings at power-up can be changed at the factory. Standard selections are described in
Section 6.0 “MIC24045 Default Settings Values at Power-Up”. Overwriting default settings by I²C has
no permanent effect and values will return to factory default values upon power cycling.
The functionality of the MIC24045 at any output voltage selection is subject to limitations described in
Section 7.0 “Application Information”.
REGISTER 5-5: COMMAND – COMMAND REGISTER (ADDRESS 4h)
RW-0
Reserved
bit 7
RW-0
Reserved
RW-0
Reserved
RW-0
Reserved
RW-0
Reserved
RW-0
Reserved
RW-0
Reserved
RW-0
ClFF
bit 0
Legend:
R = Readable bit
-n = Value at POR
RC = Read-then-clear bit
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-1
bit 0
Reserved<7:1>: Writing to these bits has no effect to the device operation.
ClFF: Clear Fault Flags bit. Writing ‘1’ to bit 0 will clear all Fault Flags. The ClFF bit is self-clearing and
it returns to ‘0’ as soon as the Fault Flags have been cleared.
DS20005568A-page 26
 2016 Microchip Technology Inc.