PIC16F877-20L Datasheet, PDF (33/218 Pages) Microchip Technology – 28/40-Pin 8-Bit CMOS FLASH Microcontrollers

3.3 PORTC and the TRISC Register
PORTC is an 8-bit wide, bi-directional port. The corre-
sponding data direction register is TRISC. Setting a
TRISC bit (= 1) will make the corresponding PORTC
pin an input (i.e., put the corresponding output driver in
a Hi-Impedance mode). Clearing a TRISC bit (= 0) will
make the corresponding PORTC pin an output (i.e., put
the contents of the output latch on the selected pin).
PORTC is multiplexed with several peripheral functions
(Table 3-5). PORTC pins have Schmitt Trigger input
buffers.
When the I²C module is enabled, the PORTC<4:3>
pins can be configured with normal I²C levels, or with
SMBus levels by using the CKE bit (SSPSTAT<6>).
When enabling peripheral functions, care should be
taken in defining TRIS bits for each PORTC pin. Some
peripherals override the TRIS bit to make a pin an out-
put, while other peripherals override the TRIS bit to
make a pin an input. Since the TRIS bit override is in
effect while the peripheral is enabled, read-modify-
write instructions (BSF, BCF, XORWF) with TRISC as
destination, should be avoided. The user should refer
to the corresponding peripheral section for the correct
TRIS bit settings.
FIGURE 3-5:
PORTC BLOCK DIAGRAM
(PERIPHERAL OUTPUT
OVERRIDE) RC<2:0>,
RC<7:5>
Port/Peripheral Select⁽²⁾
Peripheral Data Out
0
Data Bus
DQ
WR
Port
CK Q
1
Data Latch
WR
TRIS
DQ
CK Q
TRIS Latch
RD
TRIS
Peripheral
OE⁽³⁾
Q
VDD
P _I/O
pin⁽¹⁾
N
VSS
Schmitt
Trigger
D
RD
EN
Port
Peripheral Input
Note 1: I/O pins have diode protection to VDD and VSS.
2: Port/Peripheral select signal selects between port
data and peripheral output.
3: Peripheral OE (output enable) is only activated if
peripheral select is active.
PIC16F87X
FIGURE 3-6:
PORTC BLOCK DIAGRAM
(PERIPHERAL OUTPUT
OVERRIDE) RC<4:3>
Port/Peripheral Select⁽²⁾
Peripheral Data Out
Data Bus
WR
Port
DQ
CK Q
Data Latch
WR
TRIS
RD
TRIS
DQ
CK Q
TRIS Latch
Peripheral
OE⁽³⁾
RD
Port
SSPl Input
0
VDD
P
I/O
1
pin⁽¹⁾
N
Vss
Schmitt
Trigger
QD
EN
Schmitt
Trigger
with
SMBus
0 levels
1
CKE
SSPSTAT<6>
Note 1: I/O pins have diode protection to VDD and VSS.
2: Port/Peripheral select signal selects between port data
and peripheral output.
3: Peripheral OE (output enable) is only activated if
peripheral select is active.
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DS30292D-page 33