PIC24FJ256GA106T-I Datasheet, PDF (225/292 Pages) Microchip Technology – 64/80/100-Pin, 16-Bit General Purpose Flash Microcontrollers with Peripheral Pin Select

PIC24FJ256GA110 FAMILY
21.0 TRIPLE COMPARATOR
MODULE
Note:
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
associated “PIC24F Family Reference
Manual” chapter.
The triple comparator module provides three dual-input
comparators. The inputs to the comparator can be con-
figured to use any one of four external analog inputs as
well, as a voltage reference input from either the
internal band gap reference divided by two (VBG/2) or
the comparator voltage reference generator.
The comparator outputs may be directly connected to
the CxOUT pins. When the respective COE equals ‘1’,
the I/O pad logic makes the unsynchronized output of
the comparator available on the pin.
A simplified block diagram of the module in shown in
Figure 21-1. Diagrams of the possible individual com-
parator configurations are shown in Figure 21-2.
Each comparator has its own control register,
CMxCON (Register 21-1), for enabling and configuring
its operation. The output and event status of all three
comparators is provided in the CMSTAT register
(Register 21-2).
FIGURE 21-1:
TRIPLE COMPARATOR MODULE BLOCK DIAGRAM
CCH1:CCH0
CREF
CXINB
CXINC
CXIND
VBG/2
Input
Select
Logic
VIN-
VIN+ ^C1
VIN-
VIN+ ^C2
EVPOL1:EVPOL0
CPOL
Trigger/Interrupt
Logic
CEVT
COE
C1OUT
COUT ^Pin
EVPOL1:EVPOL0
CPOL
Trigger/Interrupt
Logic
CEVT
COE
C2OUT
COUT ^Pin
CXINA
CVREF
VIN-
VIN+ ^C3
EVPOL1:EVPOL0
CPOL
Trigger/Interrupt
Logic
CEVT
COE
C3OUT
COUT ^Pin
© 2008 Microchip Technology Inc.
Preliminary
DS39905B-page 223