PIC24FJ256GA106T-I Datasheet, PDF (222/292 Pages) Microchip Technology – 64/80/100-Pin, 16-Bit General Purpose Flash Microcontrollers with Peripheral Pin Select

PIC24FJ256GA110 FAMILY
REGISTER 20-7: AD1CSSL: A/D INPUT SCAN SELECT REGISTER (LOW)
R/W-0
CSSL15
bit 15
R/W-0
CSSL14
R/W-0
CSSL13
R/W-0
CSSL12
R/W-0
CSSL11
R/W-0
CSSL10
R/W-0
CSSL9
R/W-0
CSSL8
bit 8
R/W-0
CSSL7
bit 7
R/W-0
CSSL6
R/W-0
CSSL5
R/W-0
CSSL4
R/W-0
CSSL3
R/W-0
CSSL2
R/W-0
CSSL1
R/W-0
CSSL0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-0
CSSL15:CSSL0: A/D Input Pin Scan Selection bits
1 = Corresponding analog channel selected for input scan
0 = Analog channel omitted from input scan
REGISTER 20-8: AD1CSSH: A/D INPUT SCAN SELECT REGISTER (HIGH)
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
bit 15
U-0
—
bit 8
U-0
U-0
U-0
U-0
U-0
U-0
R/W-0
R/W-0
—
—
—
—
—
—
CSSL17
CSSL16
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-2
bit 1
bit 0
Unimplemented: Read as ‘0’
CSSL17: A/D Input Band Gap Scan Selection bit
1 = Internal band gap (VBG) channel selected for input scan
0 = Analog channel omitted from input scan
CSSL16: A/D Input Half Band Gap Scan Selection bit
1 = Internal VBG/2 channel selected for input scan
0 = Analog channel omitted from input scan
EQUATION 20-1: A/D CONVERSION CLOCK PERIOD⁽¹⁾
TAD = TCY • (ADCS + 1)
ADCS = ^TAD – 1
TCY
Note 1: Based on TCY = 2 * TOSC; Doze mode and PLL are disabled.
DS39905B-page 220
Preliminary
© 2008 Microchip Technology Inc.