English
Language : 

PIC24FJ256GA106T-I Datasheet, PDF (105/292 Pages) Microchip Technology – 64/80/100-Pin, 16-Bit General Purpose Flash Microcontrollers with Peripheral Pin Select
PIC24FJ256GA110 FAMILY
7.0 OSCILLATOR
CONFIGURATION
Note:
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
“PIC24F Family Reference Manual”,
“Section 6. Oscillator” (DS39700).
The oscillator system for PIC24FJ256GA110 family
family devices has the following features:
• A total of four external and internal oscillator options
as clock sources, providing 11 different clock modes
• On-chip 4x PLL to boost internal operating frequency
on select internal and external oscillator sources
• Software-controllable switching between various
clock sources
• Software-controllable postscaler for selective
clocking of CPU for system power savings
• A Fail-Safe Clock Monitor (FSCM) that detects
clock failure and permits safe application recovery
or shutdown
• A separate and independently configurable system
clock output for synchronizing external hardware
A simplified diagram of the oscillator system is shown
in Figure 7-1.
FIGURE 7-1:
PIC24FJ256GA110 FAMILY CLOCK DIAGRAM
OSCO
OSCI
SOSCO
SOSCI
Primary Oscillator
FRC
Oscillator
8 MHz
(nominal)
LPRC
Oscillator 31 kHz (nominal)
Secondary Oscillator
SOSCEN
Enable
Oscillator
XT, HS, EC
4 x PLL
XTPLL, HSPLL
ECPLL, FRCPLL
8 MHz
4 MHz
FRCDIV
CLKDIV<10:8>
FRC
LPRC
REFOCON<15:8>
Reference Clock
Generator
REFO
Peripherals
CLKO
CPU
SOSC
CLKDIV<14:12>
Clock Control Logic
Fail-Safe
Clock
Monitor
WDT, PWRT
Clock Source Option
for Other Modules
© 2008 Microchip Technology Inc.
Preliminary
DS39905B-page 103