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| PIC24FJ256GA106T-I Datasheet, PDF (147/292 Pages) Microchip Technology – 64/80/100-Pin, 16-Bit General Purpose Flash Microcontrollers with Peripheral Pin Select | |||
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PIC24FJ256GA110 FAMILY
FIGURE 11-2:
TIMER2 AND TIMER4 (16-BIT SYNCHRONOUS) BLOCK DIAGRAM
T2CK
(T4CK)
Gate
Sync
TON
1x
01
TCKPS1:TCKPS0
2
Prescaler
1, 8, 64, 256
TGATE
1
Set T2IF (T4IF)
0
TCY
QD
Q CK
Reset
TMR2 (TMR4)
00
TCS(1)
TGATE(1)
Sync
Equal
Comparator
PR2 (PR4)
Note 1: The Timer Clock input must be assigned to an available RPn pin before use. Please see Section 9.4 âPeripheral
Pin Selectâ for more information.
FIGURE 11-3:
TIMER3 AND TIMER5 (16-BIT ASYNCHRONOUS) BLOCK DIAGRAM
T3CK
(T5CK)
Sync
TON
1x
01
TCKPS1:TCKPS0
2
Prescaler
1, 8, 64, 256
TGATE
1
Set T3IF (T5IF)
0
TCY
QD
Q CK
Reset
TMR3 (TMR5)
ADC Event Trigger(2)
Equal
Comparator
00
TCS(1)
TGATE(1)
PR3 (PR5)
Note 1:
2:
The Timer Clock input must be assigned to an available RPn pin before use. Please see Section 9.4 âPeripheral
Pin Selectâ for more information.
The ADC Event Trigger is available only on Timer3.
© 2008 Microchip Technology Inc.
Preliminary
DS39905B-page 145
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