PIC24FJ64GA006-I Datasheet, PDF (195/258 Pages) Microchip Technology – 64/80/100-Pin, General Purpose, 16-Bit Flash Microcontrollers

PIC24FJ128GA010 FAMILY
24.0 SPECIAL FEATURES
Note:
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive refer-
ence source. Refer to Section 32.
“High-Level Device Integration”
(DS39719) in the “PIC24F Family
Reference Manual” for more information.
PIC24FJ128GA010 devices include several features
intended to maximize application flexibility and reliabil-
ity, and minimize cost through elimination of external
components. These are:
• Flexible Configuration
• Watchdog Timer (WDT)
• Code Protection
• JTAG Boundary Scan Interface
• In-Circuit Serial Programming™ (ICSP™)
• In-Circuit Emulation
24.1 Configuration Bits
The Configuration bits can be programmed (read as
‘0’) or left unprogrammed (read as ‘1’) to select various
device configurations. These bits are mapped, starting
at program memory location, F80000h. A complete list
is shown in Table 24-1. A detailed explanation of the
various bit functions is provided in Register 24-1
through Register 24-4.
Note that address, F80000h, is beyond the user program
memory space. In fact, it belongs to the configuration
memory space (800000h-FFFFFFh), which can only be
accessed using table reads and table writes.
24.1.1
CONSIDERATIONS FOR
CONFIGURING PIC24FJ128GA010
FAMILY DEVICES
In PIC24FJ128GA010 family devices, the configuration
bytes are implemented as volatile memory. This means
that configuration data must be programmed each time
the device is powered up. Configuration data is stored
in the two words at the top of the on-chip program
memory space, known as the Flash Configuration
Words. Their specific locations are shown in
Table 24-1. These are packed representations of the
actual device Configuration bits, whose actual
locations are distributed among five locations in config-
uration space. The configuration data is automatically
loaded from the Flash Configuration Words to the
proper Configuration registers during device Resets.
Note: Configuration data is reloaded on all types
of device Resets.
TABLE 24-1: FLASH CONFIGURATION
WORD LOCATIONS
Device
Configuration Word
Addresses
1
2
PIC24FJ64GA
PIC24FJ96GA
PIC24FJ128GA
00ABFEh
00FFFEh
0157FEh
00ABFCh
00FFFCh
0157FCh
When creating applications for these devices, users
should always specifically allocate the location of the
Flash Configuration Word for configuration data. This is
to make certain that program code is not stored in this
address when the code is compiled.
The Configuration bits are reloaded from the Flash
Configuration Word on any device Reset.
The upper byte of both Flash Configuration Words in
program memory should always be ‘1111 1111’. This
makes them appear to be NOP instructions in the
remote event that their locations are ever executed by
accident. Since Configuration bits are not implemented
in the corresponding locations, writing ‘1’s to these
locations has no effect on device operation.
 2005-2012 Microchip Technology Inc.
DS39747F-page 195