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PIC24FJ64GA006-I Datasheet, PDF (182/258 Pages) Microchip Technology – 64/80/100-Pin, General Purpose, 16-Bit Flash Microcontrollers
PIC24FJ128GA010 FAMILY
REGISTER 21-2: AD1CON2: A/D CONTROL REGISTER 2
R/W-0
R/W-0
R/W-0
U-0
VCFG2
VCFG1
VCFG0
r
bit 15
U-0
R/W-0
U-0
—
CSCNA
—
U-0
—
bit 8
R-0
U-0
BUFS
—
bit 7
R/W-0
SMPI3
R/W-0
SMPI2
R/W-0
SMPI1
R/W-0
SMPI0
R/W-0
BUFM
R/W-0
ALTS
bit 0
Legend:
R = Readable bit
-n = Value at POR
r = Reserved bit
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-13
bit 12
bit 11
bit 10
bit 9-8
bit 7
bit 6
bit 5-2
bit 1
bit 0
VCFG<2:0>: Voltage Reference Configuration bits:
VCFG<2:0>
000
001
010
011
1xx
VR+
AVDD
External VREF+ pin
AVDD
External VREF+ pin
AVDD
VR-
AVSS
AVSS
External VREF- pin
External VREF- pin
AVSS
Reserved
Unimplemented: Read as ‘0’
CSCNA: Scan Input Selections for CH0+ S/H Input for MUX A Input Multiplexor Setting bit
1 = Scan inputs
0 = Do not scan inputs
Unimplemented: Read as ‘0’
BUFS: Buffer Fill Status bit (valid only when BUFM = 1)
1 = A/D is currently filling Buffer 08-0F, user should access data in 00-07
0 = A/D is currently filling Buffer 00-07, user should access data in 08-0F
Unimplemented: Read as ‘0’
SMPI<3:0>: Sample/Convert Sequences Per Interrupt Selection bits
1111 = Interrupts at the completion of conversion for each 16th sample/convert sequence
1110 = Interrupts at the completion of conversion for each 15th sample/convert sequence
.....
0001 = Interrupts at the completion of conversion for each 2nd sample/convert sequence
0000 = Interrupts at the completion of conversion for each sample/convert sequence
BUFM: Buffer Mode Select bit
1 = Buffer configured as two 8-word buffers (ADC1BUFx<15:8> and ADC1BUFx<7:0>)
0 = Buffer configured as one 16-word buffer (ADC1BUFx<15:0>)
ALTS: Alternate Input Sample Mode Select bit
1 = Uses MUX A input multiplexor settings for the first sample, then alternates between the MUX B and
MUX A input multiplexor settings for all subsequent samples
0 = Always uses MUX A input multiplexor settings
DS39747F-page 182
 2005-2012 Microchip Technology Inc.