MIC3002_10 Datasheet, PDF (8/65 Pages) Micrel Semiconductor – FOM Management IC with Internal Calibration

Micrel, Inc.
MIC3002
Pin Description
Pin Number
11
Pin Name
TXDISABLE
12
DATA
13
CLK
14
VIN/INT
15
RSIN
16
GNDD
17
NC
18
VDDD
19
RXLOS
20
RS0/GPO
21
COMP
22
VBIAS
23
VMOD–
24
VMOD+
Pin Function
Digital Input; Active High. The transmitter is disabled when this line is high or the STXDIS bit is
set. The state of this input is always reflected in the TXDIS bit.
Digital I/O; Open-drain. Bi-directional serial data input/output.
Digital Input; Serial clock input.
If bit 4 (IE) in USRCTL register is set to 0 (default), this pin is configured as analog input. If IE bit
is set to 1, this pin is configured as open-drain output. Analog Input: Multiplexed A/D input for
monitoring supply voltage. 0V to 5.5V input range. Open-drain output: outputs the internally
generated interrupt signal /INT.
Digital Input; Rate Select Input; ORed with rate select bit to determine the state of the RSOUT pin.
The state of this pin is always reflected in the RSEL bit.
Ground return for digital functions.
No connection. This pin is used for test purposes and must be left unconnected.
Power supply input for digital functions.
Digital Output; programmable polarity Open-Drain. Indicates the loss of the received signal as
indicated by a level of received optical power below the programmed RXLOS comparator
threshold; may be wire-ORed with external signals. Normal operation is indicated by a Low level
when OEMCFG6-3 is set to 0 and a high level when OEMCFG6-3 is set to 1. RXLOS is de-
asserted when VRX > LOSFLTn. The LOS bit reflects the state of RXLOS whether driven by the
MIC3002 or an external circuit.
Digital Output. Open-Drain or push-pull. When used as rate select output, it represents the
receiver rate select as per SFF. This output is controlled by the SRSEL bit ORed with RSIN input
and is open drain only. When used as a general-purpose, non-volatile output, it is controlled by
the GPO configuration bits in OEMCFG3.
Analog Output, compensation terminal. Connect a capacitor between this pin and GNDA or VDDA
with appropriate value to tune the APC loop time constant to a desirable value.
Analog Output. Buffered DAC output capable of sourcing or sinking up to 10mA under control of
the APC function to drive an external transistor for laser diode D.C. bias. The output and
feedback polarity are programmable to accommodate either a NPN or a PNP transistor to drive a
common-anode or common-cathode laser diode.
Analog Input. Inverting terminal of VMOD buffer op-amp. Connect to VMOD+ (gain = 1) or
feedback resistors network to set a different gain
Analog Output. Buffered DAC output to set the modulation current on the laser driver IC. Operates
with either a 0– VREF or a (VDD–VREF) – VDD output swing so as to generate either a ground-
referenced or a VDD referenced programmed voltage. A simple external circuit can be used to
generate a programmable current for those drivers that require a current rather than a voltage
input. See “Applications Information” section for more details.
July 2007
8
M9999-073107-B
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