MLX90363 Datasheet, PDF (45/57 Pages) Melexis Microelectronic Systems – Triaxis® Magnetometer IC With High Speed Serial Interface

MLX90363
Triaxis® Magnetometer IC
With High Speed Serial Interface
19.2. Signal Processing (GETx)
The digital signal processing performed by the firmware is depicted by the following diagram.
Inputs
from
EEPROM
OfsX0
OfsY0
OfsZ0
Xslope
Yslope
Zslope
Inputs
from ADC
Xadc
XB
+
X_{1 +}
X₂
-
+
OfsX = ( OfsX0 + XSlope *
dT ) * VG / VGMAX
T25
Tm40
T125
ORTH
SMIS
FIR/IIR
Setting
If Orth_Sel =0
FIR/IIR
Filter
*
X
ORTH_XY
*
Yadc
+
Y_{1 +}
Y₂
-
+
FIR/IIR
Filter
Y
YB
OfsY = ( OfsY0 + YSlope *
dT ) * VG / VGMAX
If 3D=0
kalpha
kbeta
kt
If Marker = 0
DSP
Outputs
If Orth_Sel
=1
Alpha = atan( B2 / B1)
Map
X,Y,Z
on
B1,B2,
B3
ORTH
_B1B2
*
*
B1
If Marker = 1
*
SMIS
Alpha = atan( Sqrt(
(kalpha.B3)² + (kt.B2)² ) / B1)
Beta = atan( Sqrt(
(Kbeta.B3)² + (kt.B1)² ) / B2 )
*
B2
ALPHA
BETA
Zadc
+
Z_{1 +}
Z₂
-
+
FIR/IIR
Filter
Z
B3
Digital Signal (Post)-Processing
ZB
OfsZ = ( OfsZ0 + ZSlope *
dT ) * VG / VGMAX
SCI Message Coding
Case Marker = 2
T
+
-
*
dT
T125
+
T25
-
Tslope
Tm40
Norm = max(abs(X₁,X₂,Y₁,Y₂,Z₁,Z₂))
90363 ABB Digital Signal (Pre)-Processing
ALPHA
BETA
ALPHA
VG
SCI Message Coding
Case Marker = 1
SCI Message Coding
Case Marker = 0
Figure 27 – Block Diagram of Signal Processing – Function model
19.3. Fail-safe Mode
The purpose of fail-safe mode is dual:
1. To increase the safety integrity, by blocking any position calculation and position reporting
whenever a critical error (WD error, ROM Checksum, Firmware flow error…) is detected
2. To report the root cause of the failure
In fail-safe mode,
The analog is [set] inactive
The sensor waits for the master to initiate a reset
Autonomous reset by watchdog after 100ms, i.e. watchdog running but will not be acknowledged
Only SPI driver and communication handler is active. The only supported MOSI commands is
- sciREBOOT
Upon all SPI MOSI commands, the MISO message SPI_ERROR ( = DiagDetailAnswer) is sent
Diagnostics (analog and digital) and background are not running
Fail-safe mode – entry conditions
The fail-safe mode is entered upon:
- Critical error during initialization (RAM BIST, WD BIST, ROM Checksum, EEPROM CRC)
- Critical error during background/digital diagnostics (RAM continuous test, ROM test, EEPROM CRC)
- Exception, i.e. system level interrupts (Stack-overflow, invalid address, protection error, program
error)
- FW flow error
3901090363
Rev. 005
Page 45 of 57
Data Sheet
Jul/13