MLX75030 Datasheet, PDF (30/72 Pages) Melexis Microelectronic Systems – Universal ActiveLight Sensor Interface

MLX75030 Universal ActiveLight Sensor Interface
Datasheet
7.2.2. Detailed Explanation of SPI Instruction Words
7.2.2.1. NOP – Idle Command
The Idle Command can be used to read back the internal status flags that appear in the Data1 Byte.
The state of the device is not changed after the NOP command is uploaded.
7.2.2.2. CR – Chip Reset Command
After upload of a Chip Reset command, the sensor returns to a state as it is after power-up (Normal Running Mode) except
for the watchdog counter, the state of the MR line and the contents of the 'Rst' register. The watchdog counter, the 'Rst'
register and the state of the MR line will not be influenced by a CR command.
The CR command can be uploaded at any time, even during a measurement or a read-out cycle, provided that the internal
synchronization counter is reset. This is done by setting the CS pin high for at least a time t_{cs_inter}.
When a CR command is uploaded during sleep mode resp. standby mode, the device goes automatically into normal running
mode. Note that this requires a time t_{wakeup_slp} resp. t_{wakeup_stby} before the internal analog circuitry is fully set up again.
Right after upload of a CR command, the DR pin will go low during a time t_startup. Once the wake-up/reset phase is complete,
the DR pin will go high.
7.2.2.3. RSLP/CSLP – Request Sleep/Confirm Sleep
To avoid that the slave device goes unintentionally into sleep mode, the master has to upload two commands. First a RSLP
(Request Sleep) shall be uploaded, then the slave sets bit 4 of the internal status flag byte high. The master has to confirm
the sleep request by uploading a CSLP (Confirm Sleep). Afterwards the slave will go into Sleep Mode, hereby reducing the
current consumption.
The status flag can be cleared by uploading a CR command or a NRM command.
Note that uploading a Chip Reset makes the device switching into normal running mode.
When the device is operating in Sleep Mode, the WAKE_UP pin will be monitored. A falling edge on WAKE_UP will wake up
the device and will switch it into Normal Running Mode.
When the device is operating in Sleep Mode, the WT pin will be monitored. If a falling edge is detected, the Critical Error flag
in the Internal Status Flag Byte will be set high and the corresponding bit in the 'Err' register will be set high (refer also to
Sections 7.3 and 7.4.7).
Note that no pull-up or pull-down resistor is foreseen on the WAKE_UP pin. To avoid that parasitic spikes can wake up the
device, the WAKE_UP input is debounced (typical debounce time is in the range of 2µs). The low time on the WAKE_UP pin
should be at least a time t_{wu_l}.
The state of the DR pin will not be changed when going into Sleep Mode. However, after a wake-up event the DR pin is set
low during a time t_{wakeup_slp}.
REVISION 005 – DECEMBER 2013
3901075030
PAGE 30 OF 72