MLX75030 Datasheet, PDF (27/72 Pages) Melexis Microelectronic Systems – Universal ActiveLight Sensor Interface

MLX75030 Universal ActiveLight Sensor Interface
Datasheet
t_{cs_sclk}
t_{sclk_cs}
t_{cs_inter}
CS
SCLK
MOSI
MISO
Tri state
7 6 5 4 32 1 07 6 5 43 2 1 0
Control1 Byte
Control2 Byte
Data1 Byte
Data2 Byte
Tri state
Figure 8 : SPI Timing Diagram for 2 byte instructions
The basic structure of a command consists of 2 bytes: the Control1 Byte and the Control2 Byte that are uploaded to the
device and the Data1 Byte and the Data2 Byte that are downloaded to the micro-controller. Exceptions are the commands
needed to read and write the user registers (WR/RR). These commands need 3 bytes. The timing diagram is given in Figure 9.
All data transfer happens with MSB first, LSB last. Referring to Figure 8 and Figure 9 :
within a byte, bit 7 is always defined as the MSB, bit 0 is the LSB. This applies to all data transfers from master to slave and
vice versa.
t_{cs_sclk}
t_{sclk_cs} t_{cs_inter}
CS
SCLK
MOSI
MISO
Tri state
7 6 5 4 32 1 07 6 5 43 2 1 0 7 65 4 3 21 0
Control1 Byte
Control2 Byte
Control3 Byte
Data1 Byte
Data2 Byte
Data3 Byte
Tri state
Figure 9 : SPI Timing Diagram for 3 byte instructions
The MSB of the Control1 Byte (bit 7) is a command token: setting this bit to 1 means that the Control1 Byte will be
interpreted as a new command. If the MSB is 0, the next bits are ignored and no command will be accepted. The idle
command has a Control1 Byte of 0x00.
The command type (chip reset, power mode change, start measurements, start read-out, read/write register) is selected
with the next bits 6..0 of the Control1 Byte.
The Control2 Byte consists of 0x00, to allow clocking out the Data2 Byte. The Data2 Byte contains always the Ctrl1 Byte that
was uploaded. Thus the micro-controller can check that the Data2 Byte is an exact replica of the Ctrl1 Byte, to verify that the
right command is uploaded to the device.
The Data1 Byte contains some internal status flags to allow checking the internal state of the device.
The internal status flags are defined in the table below.
See section 7.3 for more information concerning the operation of the status flags.
REVISION 005 – DECEMBER 2013
3901075030
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