MCF5407AI162 Datasheet, PDF (491/546 Pages) Micro Commercial Components – Integrated Microprocessor Users Manual

Reset Timing Specifications
20.4 Reset Timing Specifications
Table 20-8 lists specifications for the reset timing parameters shown in Figure 20-14.
Table 20-8. Reset Timing Specification
Num
Characteristic
54 MHz CLKIN
Min Max
Units
R1 ¹
Valid to CLKIN (setup)
7.5
—
nS
R2
CLKIN to invalid (hold)
1.0
—
nS
R3
RSTI to invalid (hold)
1.0
—
nS
1 _{RSTI and D[7:0] are synchronized internally. Setup and hold times}
must be met only if recognition on a particular clock is required.
Figure 20-14 shows reset timing for the values in Table 20-8.
CLKIN
R1
RSTI
R2
D[7:0]
R1
R3
Note: Mode selects are registered on the rising CLKIN edge before the cycle in which RSTI is
recognized as being negated.
Figure 20-14. Reset Timing
Chapter 20. Electrical Specifications
20-15