MAX1101 Datasheet, PDF (9/12 Pages) Maxim Integrated Products – Single-Chip, 8-Bit CCD Digitizer with Clamp and 6-Bit PGA

Single-Chip, 8-Bit CCD Digitizer
with Clamp and 6-Bit PGA
CCD (OUT)
VIDEO N
VIDEO N+1
VIDEO N+2
VIDEO N+3
VIDSAMP
CLAMP
PGA
AUTO-ZERO
SAMPLE N
AUTO-ZERO
SAMPLE N+1
AUTO-ZERO
SAMPLE N+2
AUTO-ZERO
SAMPLE N+3
ADC
ADC REG
SHIFT REG
MSB N-1 LSB N-1 SAMPLE N
MSB N
LSB N SAMPLE N+1 MSB N+1 LSB N+1 SAMPLE N+2 MSB N+2 LSB N+2 SAMPLE N+3
DATA N-2
DATA N-3
DATA N-1
DATA N-2
DATA N
DATA N-1
DATA N+1
DATA N
SCLK
DATA ^{D7 D6 D5 D4 D3 D2 D1 D0}
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
D7
DATA N-3
DATA N-2
DATA N-1
DATA N
Figure 9. MODE = 1 Timing Showing Data Latency
CCD (OUT)
VIDSAMP
CLAMP
(ONCE PER LINE)
CLAMP
(ONCE PER CELL)
BLACK CELL
BLACK CELL
VIDEO N
Figure 10. MODE = 1 Timing Showing Relationship of CLAMP to VIDSAMP
Input/Output Transfer Function
CCD Input
Figure 11 shows the MAX1101 transfer function for
CCDIN. Coding is binary, with a -4LSB offset added to
ensure that offsets within the MAX1101, which can be
positive or negative, do not cause the ADC to be out of
range. Full-scale input range at CCDIN is:
(V_REF+ - V_REF-) / G_PGA
where G_PGA is the gain of the programmable gain
amplifier.
Analog Inputs (AIN_)
The transfer function for auxiliary inputs is shown in
Figure 11. Again, coding is binary and full-scale range
is V_REF- to V_REF+. An offset has not been added to
these channels; however, code transitions occur at the
1/2LSB point, as shown in Figure 12.
Implementing Correlated
Double Sampling (CDS) or
Black-Level Compensation
The CLAMP circuit in the MAX1101 can be used to either
accomplish CDS or to compensate for the CCD black
level. To accomplish CDS, CLAMP is activated once per
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