MAX1464 Datasheet, PDF (7/47 Pages) Maxim Integrated Products – Low-Power, Low-Noise Multichannel Sensor Signal Processor

Low-Power, Low-Noise Multichannel
Sensor Signal Processor
ELECTRICAL CHARACTERISTICS (continued)
(V_DDF = V_DD = 4.5V to 5.5V, V_SSF = V_SS = 0V, f_CLK = 4.0MHz, T_A = T_MIN to T_MAX. Typical values are at V_DDF = V_DD = 5.0V, V_SSF = V_SS = 0V,
T_A = +25°C, unless otherwise noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
DIGITAL INPUTS (GPIO1, GPIO2, SCLK, DI, CKSEL, CKIO, CS)
Input High Threshold Voltage
V_IH
MIN TYP
0.8 x
V_DD
Input Low Threshold Voltage
V_IL
Input Hysteresis
Input Leakage Current
V_IHYS
I_IN
CKSEL, CS = V_SS
GPIO1, GPIO2, SCLK, DI, CKIO = V_DD
Input Capacitance
C_IN
DIGITAL OUTPUTS (GPIO1, GPIO2, DO, CKIO)
Output-Voltage High
GPIO1, GPIO2, DO
R_LOAD = ∞
CKIO (Note 10)
V_OH
GPIO1, GPIO2, DO
R_LOAD = 2kΩ to V_{SS CKIO (Note 10)}
Output-Voltage Low
GPIO1, GPIO2, DO
R_LOAD = ∞
CKIO (Note 10)
V_OL
GPIO1, GPIO2, DO
R_LOAD = 2kΩ to V_DD
CKIO (Note 10)
FLASH MEMORY
Maximum Erase Cycles
(Notes 11, 12)
Minimum Erase Time
Minimum Write Time
FLASH Programming Current
t_ERASE
t_WRITE
I_DDFP
(Notes 11, 12)
(Notes 11, 12)
Writing to the FLASH or erasing the FLASH
(Note 13)
0.2
38
38
5
V_DD - 0.1
4.9
V_DD - 0.15
4.6
0.1
0.4
10k
4.2
80
MAX
0.2 x
V_DD
-90
+90
0.05
0.2
30
UNITS
V
V
V
µA
pF
V
V
Cycles
ms
µs
mA
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to V_SS.
All modules are off, except internal reference, oscillator, and power-on reset (POR) and CKSEL bit is set to zero.
The CPU and ADC are not on at the same time. The ADC and CPU currents are not additive.
I_DACn does not include output buffer currents (I_OPLGn or I_OPSMn).
For gains above 240, an additional digital gain can be provided by the CPU.
The PWM input data is the 12-bit left-justified data in the 16-bit input field.
PWM gain error measured as:
GE_PWM
=
PWM_OUT(F00Xh₎ − PWM_OUT(100Xh₎
3584
× 100%
Note 8: The internal reference voltage has a nominal value of 5V (4 ✕ V_BG) even when V_DD is greater or less than 5VDC.
Note 9: Input-referred offset error is the ADC offset error divided by the PGA gain.
Note 10: When the CKIO is configured in output mode to observe the internal oscillator signal, the total current is above the
specified limits.
Note 11: f_CLK must be within 5% of 4MHz.
Note 12: Allow a minimum elapsed time of 4.2ms when executing a FLASH erase command, before sending any other command.
Allow a minimum elapsed time of 80µs between FLASH write commands.
Note 13: FLASH programming current is guaranteed by design.
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