MAX1464 Datasheet, PDF (23/47 Pages) Maxim Integrated Products – Low-Power, Low-Noise Multichannel Sensor Signal Processor

Low-Power, Low-Noise Multichannel
Sensor Signal Processor
Description:
Perform a 16-bit logical AND operation, bit for bit, on
the contents of the A-register and the contents of the X-
register. Store the 16-bit result back into the A-register.
The previous contents of the A-register are overwritten
and lost.
Register X can be any of the 16 CPU registers.
PC is incremented once to point to the next instruction
in program memory.
Two’s-complement data format is not preserved.
No branching occurs.
No other registers are affected.
ORX
OR Register X with Register A
Op-code:
0011 XXXX_BINARY 3Xh
Operation:
A-register ← A-register OR X-register
PC-register ← PC + 1 (point to next instruction)
CPU Cycles required:
1 cycle
Description:
Perform a 16-bit logical OR operation, bit for bit, on the
contents of the A-register and the contents of the X-reg-
ister. Store the 16-bit result back into the A-register.
The previous contents of the A-register are overwritten
and lost.
Register X can be any of the 16 CPU registers.
PC is incremented once to point to the next instruction
in program memory.
Two’s-complement data format is not preserved.
No branching occurs.
No other registers are affected.
ADX
ADD Register X to Register A
Op-code:
0100 XXXX_BINARY 4Xh
Operation:
A-register ← A-register + X-register
PC-register ← PC + 1 (point to next instruction)
CPU Cycles required:
1 cycle
Description:
Perform a 16-bit arithmetic addition of the A-register
and the contents of the X-register. Store the low 16 bits
of the result back into the A-register. Any overflow bit
resulting from the addition operation is lost. The previ-
ous contents of the A-register are overwritten and lost.
Register X can be any of the 16 CPU registers.
PC is incremented once to point to the next instruction
in program memory.
Two’s-complement data format is preserved.
No branching occurs.
No other registers are affected.
STX
Store Register X
Op-code:
0101 XXXX_BINARY 5Xh
Operation:
X-register ← A-register
PC-register ← PC + 1 (point to next instruction)
CPU Cycles required:
1 cycle
Description:
Perform a 16-bit move operation from the A-register into
the X-register. The A-register contents are unchanged.
The previous contents of the X-register are overwritten
and lost.
Register X can be any of the 16 CPU registers.
PC is incremented once to point to the next instruction
in program memory.
Two’s-complement data format is preserved.
No branching occurs.
No other registers are affected.
SLX
Op-code:
Shift Left Register X
0110 XXXX_BINARY 6Xh
Operation when X ≠ 6h:
REGISTER X
0
BIT: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Operation when X = 6h:
REGISTER R6
BIT: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
REGISTER M: R4
BIT: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
PC-register ← PC + 1 (point to next instruction)
CPU Cycles required:
1 cycle
______________________________________________________________________________________ 23