MAX1544 Datasheet, PDF(34/42 Page) Maxim Integrated Products – Dual-Phase, Quick-PWM Controller for AMD Hammer CPU Core Power Supplies

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MAX1544 Datasheet, PDF (34/42 Pages) Maxim Integrated Products – Dual-Phase, Quick-PWM Controller for AMD Hammer CPU Core Power Supplies

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Dual-Phase, Quick-PWM Controller for

AMD Hammer CPU Core Power Supplies

Power MOSFET Selection

Most of the following MOSFET guidelines focus on the

challenge of obtaining high load-current capability

when using high-voltage (>20V) AC adapters. Low-cur-

rent applications usually require less attention.

The high-side MOSFET (NH) must be able to dissipate

the resistive losses plus the switching losses at both

VIN(MIN) and VIN(MAX). Calculate both of these sums.

Ideally, the losses at VIN(MIN) should be roughly equal to

losses at VIN(MAX), with lower losses in between. If the

losses at VIN(MIN) are significantly higher than the losses

at VIN(MAX), consider increasing the size of NH (reducing

RDS(ON) but with higher CGATE). Conversely, if the losses

at VIN(MAX) are significantly higher than the losses at

VIN(MIN), consider reducing the size of NH (increasing

RDS(ON) to lower CGATE). If VIN does not vary over a wide

range, the minimum power dissipation occurs where the

resistive losses equal the switching losses.

Choose a low-side MOSFET that has the lowest possi-

ble on-resistance (RDS(ON)), comes in a moderate-

sized package (i.e., one or two SO-8s, DPAK, or

D2PAK), and is reasonably priced. Ensure that the DL

gate driver can supply sufficient current to support the

gate charge and the current injected into the parasitic

gate-to-drain capacitor caused by the high-side MOS-

FET turning on; otherwise, cross-conduction problems

can occur (see the MOSFET Gate Driver section).

MOSFET Power Dissipation

Worst-case conduction losses occur at the duty factor

extremes. For the high-side MOSFET (NH), the worst-

case power dissipation due to resistance occurs at the

minimum input voltage:

PD (NH RESISTIVE)

ï£«

ï£ï£¬

VOUT

VIN

ï£¶

ï£¸ï£·

ï£«

ï£¬

ï£

ILOAD

Î· TOTAL

ï£¶

ï£·

ï£¸

RDS(ON)

where Î·TOTAL is the total number of phases.

Generally, a small high-side MOSFET is desired to

reduce switching losses at high input voltages.

However, the RDS(ON) required to stay within package

power dissipation often limits how small the MOSFET

can be. Again, the optimum occurs when the switching

losses equal the conduction (RDS(ON)) losses. High-

side switching losses do not usually become an issue

until the input is greater than approximately 15V.

Calculating the power dissipation in high-side MOSFET

(NH) due to switching losses is difficult since it must

allow for difficult quantifying factors that influence the

turn-on and turn-off times. These factors include the

internal gate resistance, gate charge, threshold

voltage, source inductance, and PC board layout

characteristics. The following switching-loss calculation

provides only a very rough estimate and is no substi-

tute for breadboard evaluation, preferably including

verification using a thermocouple mounted on NH:

(NH

SWITCHING)

(VIN(MAX))2

ï£«

ï£ï£¬

CRSSfSW

IGATE

ï£¶

ï£¸ï£·

ï£«

ï£¬

ï£

ILOAD

Î· TOTAL

ï£¶

ï£·

ï£¸

where CRSS is the reverse transfer capacitance of NH

and IGATE is the peak gate-drive source/sink current

(1A typ).

Switching losses in the high-side MOSFET can become

an insidious heat problem when maximum AC adapter

voltages are applied due to the squared term in the C Ã

VIN2 Ã fSW switching-loss equation. If the high-side

MOSFET chosen for adequate RDS(ON) at low battery

voltages becomes extraordinarily hot when biased from

VIN(MAX), consider choosing another MOSFET with

lower parasitic capacitance.

For the low-side MOSFET (NL), the worst-case power

dissipation always occurs at maximum input voltage:

(NL

RESISTIVE)

ï£®

ï£¯1

ï£°

ï£«

ï£ï£¬

VOUT

VIN(MAX)

ï£¶

ï£¸ï£·

ï£¹

ï£º

ï£»

ï£«

ï£¬

ï£

ILOAD

Î· TOTAL

ï£¶2

ï£·

ï£¸

RDS(ON)

The worst-case for MOSFET power dissipation occurs

under heavy overloads that are greater than

ILOAD(MAX) but are not quite high enough to exceed

the current limit and cause the fault latch to trip. To pro-

tect against this possibility, you can âoverdesignâ the

circuit to tolerate:

ILOAD

Î·TOTAL ï£«ï£ï£¬IVALLEY(MAX)

âIINDUCTOR

ï£¶

ï£¸ï£·

Î· TOTAL IVALLEY(MAX)

ï£«

ï£ï£¬

ILOAD(MAX)LIR

ï£¶

ï£¸ï£·

where IVALLEY(MAX) is the maximum valley current

allowed by the current-limit circuit, including threshold

tolerance and on-resistance variation. The MOSFETs

must have a good-size heatsink to handle the overload

power dissipation.

Choose a Schottky diode (DL) with a forward voltage

low enough to prevent the low-side MOSFET body

diode from turning on during the dead time. As a gen-

eral rule, select a diode with a DC current rating equal

to 1/3 of the load current-per-phase. This diode is

optional and can be removed if efficiency is not critical.

Boost Capacitors

The boost capacitors (CBST) must be selected large

enough to handle the gate charging requirements of

the high-side MOSFETs. Typically, 0.1ÂµF ceramic

capacitors work well for low-power applications driving

34 ______________________________________________________________________________________

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