MAX1544 Datasheet, PDF (32/42 Pages) Maxim Integrated Products – Dual-Phase, Quick-PWM Controller for AMD Hammer CPU Core Power Supplies

Dual-Phase, Quick-PWM Controller for
AMD Hammer CPU Core Power Supplies
Transient Response
The inductor ripple current impacts transient-response
performance, especially at low V_IN - V_OUT differentials.
Low inductor values allow the inductor current to slew
faster, replenishing charge removed from the output
filter capacitors by a sudden load step. The amount of
output sag is also a function of the maximum duty fac-
tor, which can be calculated from the on-time and mini-
mum off-time. For a dual-phase controller, the
worst-case output sag voltage can be determined by:
V_SAG
=
L(∆I_LOAD(MAX))²

V_OUTK
V_IN


+

t_OFF(MIN)

2C_OUTV_OUT


(V_IN
− 2V_OUT)K 
V_IN

−

2t_{OFF(MIN)}

+
∆I_LOAD(MAX)
2C_OUT


V_OUTK
V_IN


+

t_{OFF(MIN)}

where t_OFF(MIN) is the minimum off-time (see the
Electrical Characteristics) and K is from Table 6.
The amount of overshoot due to stored inductor energy
can be calculated as:
V_SOAR
≈
(∆I_LOAD(MAX))² L
2η_TOTAL C_OUT V_OUT
where η_TOTAL is the total number of active phases.
Setting the Current Limit
The minimum current-limit threshold must be high
enough to support the maximum load current when the
current limit is at the minimum tolerance value. The val-
ley of the inductor current occurs at I_LOAD(MAX) minus
half the ripple current; therefore:
I_LIMIT(LOW)
>



I_LOAD(MAX)
η _TOTAL



_{1 −}
LIR 
2 
where η_TOTAL is the total number of active phases, and
I_LIMIT(LOW) equals the minimum current-limit threshold
voltage divided by the current-sense resistor (R_SENSE).
For the 30mV default setting, the minimum current-limit
threshold is 28mV.
Connect ILIM to V_CC for the default current-limit thresh-
old (see the Electrical Characteristics). In adjustable
mode, the current-limit threshold is precisely 1/20 the
voltage seen at ILIM. For an adjustable threshold, con-
nect a resistive divider from REF to GND with ILIM con-
nected to the center tap. When adjusting the current
limit, use 1% tolerance resistors with approximately
10µA of divider current to prevent a significant increase
of errors in the current-limit tolerance.
Output Capacitor Selection
The output filter capacitor must have low enough effec-
tive series resistance (ESR) to meet output ripple and
load-transient requirements, yet have high enough ESR
to satisfy stability requirements.
In CPU V_CORE converters and other applications where
the output is subject to large-load transients, the output
capacitor’s size typically depends on how much ESR is
needed to prevent the output from dipping too low
under a load transient. Ignoring the sag due to finite
capacitance:
R_ESR ≤
V_STEP
∆I_LOAD(MAX)
In non-CPU applications, the output capacitor’s size
often depends on how much ESR is needed to maintain
an acceptable level of output ripple voltage. The output
ripple voltage of a step-down controller equals the total
inductor ripple current multiplied by the output capaci-
tor’s ESR. When operating multiphase systems out-of-
phase, the peak inductor currents of each phase are
staggered, resulting in lower output ripple voltage by
reducing the total inductor ripple current. For 3- or
4-phase operation, the maximum ESR to meet ripple
requirements is:
R_ESR ≤
V_RIPPLEL
(2V_IN − η_TOTAL V_OUT)t_ON − η_TOTALV_OUT t_TRIG
where η_TOTAL is the total number of active phases, t_ON
is the calculated on-time per phase, and t_TRIG is the
trigger delay between the master’s DH rising edge and
the slave’s DH rising edge. The trigger delay must be
less than 1/(f_SW x η_TOTAL) for stable operation. The
actual capacitance value required relates to the physi-
cal size needed to achieve low ESR, as well as to the
chemistry of the capacitor technology. Thus, the
capacitor is usually selected by ESR and
voltage rating rather than by capacitance value (this is
true of polymer types).
When using low-capacity ceramic filter capacitors,
capacitor size is usually determined by the capacity
needed to prevent V_SAG and V_SOAR from causing
problems during load transients. Generally, once
enough capacitance is added to meet the overshoot
requirement, undershoot at the rising load edge is no
longer a problem (see the V_SAG and V_SOAR equations
in the Transient Response section).
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