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MAX1544 Datasheet, PDF (19/42 Pages) Maxim Integrated Products – Dual-Phase, Quick-PWM Controller for AMD Hammer CPU Core Power Supplies
Dual-Phase, Quick-PWM Controller for
AMD Hammer CPU Core Power Supplies
SHDN
VID (D0–D4)
SOFT-START
1 LSB PER RTIME CYCLE
VCORE
DO NOT CARE
SOFT-SHUTDOWN
1 LSB PER 4 RTIME CYCLES
VROK
tVROK(START)
3ms (TYP)
Figure 2. Power-Up and Shutdown Sequence Timing Diagram
Table 2. Component Suppliers
MANUFACTURER
BI Technologies
Central Semiconductor
Coilcraft
Coiltronics
Fairchild Semiconductor
International Rectifier
Kemet
Panasonic
Sanyo
Siliconix (Vishay)
Sumida
Taiyo Yuden
TDK
TOKO
PHONE
714-447-2345 (USA)
631-435-1110 (USA)
800-322-2645 (USA)
561-752-5000 (USA)
888-522-5372 (USA)
310-322-3331 (USA)
408-986-0424 (USA)
847-468-5624 (USA)
65-6281-3226 (Singapore)
203-268-6261 (USA)
408-982-9660 (USA)
03-3667-3408 (Japan)
408-573-4150 (USA)
847-803-6100 (USA)
81-3-5201-7241 (Japan)
858-675-8013 (USA)
WEBSITE
www.bitechnologies.com
www.centralsemi.com
www.coilcraft.com
www.coiltronics.com
www.fairchildsemi.com
www.irf.com
www.kemet.com
www.panasonic.com
www.secc.co.jp
www.vishay.com
www.sumida.com
www.t-yuden.com
www.component.tdk.com
www.tokoam.com
Shutdown
When SHDN goes low, the MAX1544 enters low-power
shutdown mode. VROK is pulled low immediately, and
the output voltage ramps down to 0V in LSB increments
at 4 times the clock rate set by RTIME:
tSHDN
≤
4
fSLEW


VDAC
VLSB


where fSLEW = 500kHz ✕ 30kΩ/RTIME, VDAC is the DAC
setting when the controller begins the shutdown
sequence, and VLSB = 25mV is the DAC’s smallest volt-
age increment. Slowly discharging the output capacitors
by slewing the output over a long period of time
(4/fSLEW) keeps the average negative inductor current
low (damped response), thereby eliminating the nega-
tive output voltage excursion that occurs when the con-
troller discharges the output quickly by permanently
turning on the low-side MOSFET (underdamped
response).
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