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MAX1540A Datasheet, PDF (33/49 Pages) Maxim Integrated Products – Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator
Dual Step-Down Controllers with Saturation
Protection, Dynamic Output, and Linear Regulator
LX_
MAX1540A/MAX1541
DL_
GND
L
NL
RSENSE
COUT
CSP_
CSN_
OUT_
RC
FB_
RD
Figure 11. Setting VOUT with a Resistive Voltage-Divider at FB_
light loads, quickly discharging the output capacitors. If
fault blanking is enabled, the MAX1541 also disables
the main controller’s (OUT1) overvoltage and undervolt-
age fault protection, and forces PGOOD1 to a high-
impedance state for the period selected by FBLANK
(Table 6).
For a step-voltage change at REFIN1, the rate of
change of the output voltage is limited by the inductor
current ramp, the total output capacitance, the current
limit, and the load during the transition. The inductor
current ramp is limited by the voltage across the induc-
tor and the inductance. The total output capacitance
determines how much current is needed to change the
output voltage. Additional load current slows down the
output-voltage change during a positive REFIN1 volt-
age change, and speeds up the output-voltage change
during a negative REFIN1 voltage change. For fast pos-
itive output-voltage transitions, the current limit must be
greater than the load current plus the transition current:
ILIMIT >
ILOAD +
COUT
dV
dt
Adding a capacitor across REFIN1 and GND filters
noise and controls the rate of change of the REFIN1
voltage during dynamic transitions. With the additional
capacitance, the REFIN1 voltage slews between the
two set points with a time constant given by REQ x
CREFIN1, where REQ is the equivalent parallel resis-
tance seen by the slew capacitor. Looking at Figure 12,
the time constant for a positive REFIN1 voltage transi-
tion is:
τPOS
=
⎡R8 × (R9+R10)
⎢
⎣
R8
+
(R9+R10)
⎤
⎥
⎦
CREFIN1
and the time constant for a negative REFIN1 voltage
transition is:
τNEG
=
⎛
⎝⎜
R8 × R9⎞
R8+R9 ⎠⎟
CREFIN1
Linear Regulator (LDO)
The maximum input voltage for the linear regulator is
28V, while the minimum input voltage is determined by
the 800mV (max) dropout voltage (VLDOIN(MIN) =
VLDOOUT + VDROPOUT) at 50mA load. Bypass the lin-
ear regulator’s output (LDOOUT) with a 4.7µF or
greater capacitor, providing at least 1µF per 5mA of
internal and external load on the linear regulator. The
LDO can source up to 100mA for powering the con-
troller or supplying a small external load.
For the MAX1540A, the linear regulator provides the 5V
bias supply that powers the gate drivers and analog
controller (Figure 1), providing stand-alone capability.
The linear regulator’s input is internally connected to
the battery voltage input (LDOIN = V+), and the gate-
driver input supply is internally connected to the linear
regulator’s output (VDD = LDOOUT). Figure 13 is the
internal linear-regulator functional diagram.
For the MAX1541, the linear regulator supports Dual
Mode operation to allow the selection of a 5V output
voltage without requiring external components (Figure
1). Connect FBLDO to GND for a fixed 5.0V output. The
linear regulator’s output voltage can be adjusted from
1.25V to 5.5V using a resistive voltage-divider (Figure
12). The MAX1541 regulates FBLDO to a 1.25V feed-
back voltage. The adjusted output voltage is:
VLDOOUT
=
VFBLDO
⎛⎝⎜1+
R11⎞
R12 ⎠⎟
where VFBLDO = 1.25V. If unused, disable the MAX1541
linear regulator by connecting LDOON to GND.
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