MAX1540A Datasheet, PDF (19/49 Pages) Maxim Integrated Products – Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator

Dual Step-Down Controllers with Saturation
Protection, Dynamic Output, and Linear Regulator
PIN
MAX1540A MAX1541
24
31
25
32
26
33
27
34
28
35
29
36
30
37
—
38
Pin Description (continued)
NAME
FUNCTION
LX1
DH1
PGOOD1
OUT1
FB1
CSN1
CSP1
FBLANK
Inductor Connection for Controller 1. Connect to the switched side of the inductor.
LX1 serves as the lower supply rail for the DH1 high-side gate driver.
High-Side Gate-Driver Output for Controller 1. DH1 swings from LX1 to BST1.
Open-Drain Power-Good Output. PGOOD1 is low when the output voltage is more
than 10% (typ) above or below the normal regulation point, during soft-start, and in
shutdown. After the soft-start circuit has terminated, PGOOD1 becomes high
impedance if the output is in regulation. For the MAX1541, PGOOD1 is
blanked—forced high-impedance state—when FBLANK is enabled and the controller
detects a transition on GATE.
Output Voltage-Sense Connection for Controller 1. Connect directly to the positive
terminal of the output capacitors as shown in the standard application circuits
(Figures 1 and 12). OUT1 senses the output voltage to determine the on-time for the
high-side switching MOSFET. For the MAX1540A, OUT1 also serves as the feedback
input when using the preset internal output voltages as shown in Figure 10. When
discharge mode is enabled by OVP/UVP, the output capacitor is discharged through
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OUT1 d
d
MAX1540A: Connect to V_CC for a +1.2V fixed output or to analog ground (GND) for a
+1.8V fixed output. For an adjustable output (0.7V to 5.5V), connect FB1 to a resistive
divider from OUT1. The FB1 regulation level is +0.7V.
MAX1541: The FB1 regulation level is set by the voltage at REFIN1.
Negative Current-Sense Input for Controller 1. Connect to the negative terminal of the
current-sense element. Figure 14 and Table 9 describe several current-sensing
options. The PWM controller does not begin a cycle unless the current sensed is less
than the valley current-limit threshold programmed at ILIM1.
Positive Current-Sense Input for Controller 1. Connect to the positive terminal of the
current-sense element. Figure 14 and Table 9 describe several current-sensing
options. The PWM controller does not begin a cycle unless the current sensed is less
than the valley current-limit threshold programmed at ILIM1.
Fault-Blanking Control Input. This four-level logic input enables or disables fault
blanking, and sets the forced-PWM operation time (t_FBLANK). When fault blanking is
enabled, PGOOD1 and the OVP/UVP protection for controller 1 are blanked for the
selected time period after the MAX1541 detects a transition on GATE. Additionally,
controller 1 enters forced-PWM mode for the duration of t_FBLANK anytime GATE
changes states. Connect FBLANK as follows:
V_CC = 220µs t_FBLANK, fault blanking enabled.
Open = 140µs t_FBLANK, fault blanking enabled.
REF = 65µs t_FBLANK, fault blanking enabled.
GND = 140µs t_FBLANK, fault blanking disabled.
See the Electrical Characteristics table for the t_FBLANK limits.
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