MAX1540A Datasheet, PDF (32/49 Pages) Maxim Integrated Products – Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator

Dual Step-Down Controllers with Saturation
Protection, Dynamic Output, and Linear Regulator
FB_
REF
(2.0V)
9R
R
TO ERROR
AMPLIFIER
MAX1540A/MAX1541
OUT_
FIXED OUTPUT
FB = V_CC
FIXED OUTPUT
FB = GND
Figure 10. MAX1540A/MAX1541 Dual Mode Feedback Decoder
Table 8. Output Voltage Configuration
OUT1
OUT2
MAX1540A MAX1541 MAX1540A MAX1541
FB_ = V_CC
Fixed 1.2V
Not
allowed
Fixed 1.5V
Fixed
1.8V
FB_ = GND Fixed 1.8V
Not
Fixed 2.5V
allowed
Fixed
2.5V
FB_ = OUT_
or adjustable
0.7V
V_REFIN1
0.7V
0.7V
Setting V_OUT with a Resistive Voltage-Divider at FB_
The output voltage can be adjusted from 0.7V to 5.5V
using a resistive voltage-divider (Figure 11). The
MAX1540A regulates FB1 and FB2 to a fixed 0.7V refer-
ence voltage. The MAX1541 regulates FB1 to the volt-
age set at REFIN1 and regulates FB2 to a fixed 0.7V
reference voltage. This makes the main MAX1541 con-
troller (OUT1) ideal for memory applications where the
termination supply must track the supply voltage. The
adjusted output voltage is:
V_{OUT_}
=
V_{FB_}
⎛
⎝⎜¹⁺
R_C
R_D
⎞
⎠⎟
where V_{FB_} = 0.7V for the MAX1540A, and V_FB1 =
V_REFIN1 and V_FB2 = 0.7V for the MAX1541.
Dynamic Output Voltages (MAX1541 OUT1 Only)
The MAX1541 regulates FB1 to the voltage set at
REFIN1. By changing the voltage at REFIN1, the
MAX1541 can be used in applications that require
dynamic output-voltage changes between two set
points. Figure 12 shows a dynamically adjustable resis-
tive voltage-divider network at REFIN1. Using the GATE
signal and open-drain output (OD), a resistor can be
switched in and out of the REFIN1 resistor-divider,
changing the voltage at REFIN1. A logic high on GATE
turns on the internal N-channel MOSFET, forcing OD to
a low-impedance state. A logic low on GATE disables
the N-channel MOSFET, so OD is high impedance. The
two output voltages (FB1 = OUT1) are determined by
the following equations:
V_OUT1(LOW)
=
V_REF
⎛
⎝⎜
R9
R8+R9
⎞
⎠⎟
V_OUT1(HIGH)
=
V_REF
⎡ (R9+R10)
⎣⎢ ^{R8 + (R9 + R10)}
⎤
⎥
⎦
The main MAX1541 controller (OUT1) automatically
enters forced-PWM operation on the rising and falling
edges of GATE, and remains in forced-PWM mode for a
minimum time selected by FBLANK (Table 6). Forced-
PWM operation is required to ensure fast, accurate
negative voltage transitions when REFIN1 is lowered.
Since forced-PWM operation disables the zero-crossing
comparator, the inductor current may reverse under
32 ______________________________________________________________________________________