MAX14826 Datasheet, PDF (19/32 Pages) Maxim Integrated Products – IO-Link Device Transceiver

MAX14826
IO-Link Device Transceiver
In SPI mode, use the LDO33Dis bit in the Mode register
to disable the 3.3V LDO. See the Mode Register [R1, R0]
= [1, 1] section for more information. LDO33 cannot be
disabled in parallel mode.
V₅ and LDO33 are not protected against short-circuits.
Power-Up
The C/Q and DO driver outputs and the UV output are
high impedance when V_CC, V₅, V_L, and/or LDO33 volt-
ages are below their respective undervoltage thresh-
olds during power-up. UV goes low and the drivers are
enabled when all these voltages exceed their respective
undervoltage lockout thresholds.
The drivers are automatically disabled if V_CC, V₅, or V_L
falls below its threshold.
Undervoltage Detection
The device monitors V_CC, V₅, V_L, and optionally LDO33
for undervoltage conditions. The C/Q and DO drivers, as
well as UV, are high-impedance when any monitored volt-
age falls below its UVLO threshold.
V_CC, V₅, and V_L undervoltage detection cannot be dis-
abled. When V_CC falls below the V_CCUVLO threshold, UV
asserts high, and IRQ/CQOC asserts low. In SPI mode,
the UV24 and UV24Int bits are also set.
The SPI register contents are unchanged while V₅ is pres-
ent, regardless of the state of V_CC and LDO33. The SPI
interface is not accessible and IRQ/CQOC is not available
when UV is asserted due to a V₅ or V_L undervoltage event.
In SPI mode, the internal 3.3V LDO regulator voltage
(V_LDO33) falls below the LDO33 undervoltage lockout
threshold, the UV33Int bit in the Status register is set and
IRQ/CQOC asserts. UV asserts if the UV33En bit in the
Mode register is set to 1.
The UV output deasserts once the undervoltage condition
is removed; however, bits in the Status register and the
IRQ/CQOC output are not cleared until the Status register
has been read if using SPI functionality.
Wake-Up Detection (SPI Mode Only)
The device detects an IO-Link wake-up condition on the
C/Q line in push-pull, high-side (PNP), or low-side (NPN)
operation modes. A wake-up condition is detected when
the C/Q output is shorted for 80Fs (typ). WU/THSD pulses
low for 190Fs (typ) when the device detects a wake-up
pulse on C/Q (Figure 5).
In SPI mode, set the WuIntEn bit in the Mode register to
set the WuInt bit in the Status register and generate an
interrupt on IRQ/CQOC when a wake-up pulse is detect-
ed. WuInt is set and IRQ/CQOC asserts immediately after
C/Q is released when WuIntEn = 1.
The wake-up dectection, WU, function is not available
in parallel mode. For IO-Link applications, monitor the
CQOC/IRQ output with a microcontroller to detect the
short-circuit on a C/Q driver during a wake-up event.
Short-Circuit Detect Outputs
(Parallel Mode only)
The MAX14826 features independent overcurrent inter-
rupt outputs for the C/Q and DO drivers. When an
overcurrent condition occurs on C/Q, IRQ/CQOC pulses
low. (Figure 9) Similarly, when an overcurrent condition
occurs on DO, SDO/DOOC pulses low.
IRQ/CQOC and/or SDO/DOOC will also pulse low when
driving capacitive and lamp loads. The drivers must
deliver maximum current to these loads/lamps as they are
being charged up or turned on.
LOAD
CURRENT
IOH
IRQ/CQOC
or
SDO/DOOC
6.3ms
Figure 9. Short-Circuit Detect Output
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400ms
VL
GND
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