MAX11156 Datasheet, PDF (18/27 Pages) Maxim Integrated Products – 18-Bit, 500ksps, ±5V SAR ADC with Internal Reference in TDFN

MAX11156
18-Bit, 500ksps, ±5V SAR ADC
with Internal Reference in TDFN
CS with Busy Indicator Mode
The CS with busy indicator mode is shown in Figure 8
where a single ADC is connected to a SPI-compatible
digital host with interrupt input. The corresponding timing
is given in Figure 9.
A rising edge on CNVST completes the acquisition, initi-
ates the conversion and forces DOUT to high impedance.
The conversion continues to completion irrespective of
the state of CNVST allowing CNVST to be used as a
select line for other devices on the board.
CNVST
tCNVPW
DIN
ACQUISITION
tSSCKCNF
SCLK
DOUT
tCONV
CONVERSION
tHSCKCNF
t_EN
tCYC
tACQ
ACQUISITION
tSCLKL
tSCLK
1
2
3
16
17
18
t_SCLKH
t_DDO
tDIS
D17
D16
D15
D1
D0
Figure 7. CS No Busy Indicator Mode Timing
CNVST
MAX11156 ^DOUT
SCLK
DIN
Figure 8. CS With Busy Indicator Mode Connection Diagram
OVDD
10kΩ
CONVERT
DIGITAL HOST
DATA IN
IRQ
CONFIG
CLK
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