MAX13101E Datasheet, PDF(14/18 Page) Maxim Integrated Products – 16-Channel Buffered CMOS Logic-Level Translators

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MAX13101E Datasheet, PDF (14/18 Pages) Maxim Integrated Products – 16-Channel Buffered CMOS Logic-Level Translators

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16-Channel Buffered CMOS

Logic-Level Translators

I/O VL_

RISE-TIME

ACCELERATOR

FALL-TIME

ACCELERATOR

VCC

I/O VCC_

RISE-TIME

ACCELERATOR

FALL-TIME

ACCELERATOR

MAX13101E

MAX13102E

MAX13103E

MAX13108E

Figure 6. Simplified Diagram (1 I/O Line)

Multiplexing Input (MULT)

The MAX13108E features a multiplexing input (MULT)

that enables 8 of the 16 channels and places the

remaining 8 into tri-state. Figure 7 depicts a typical mul-

tiplexing configuration using the MAX13108E. Drive

MULT high to enable I/O VCC1 through I/O VCC8 and

I/O VL1 through I/O VL8. Driving MULT high sets

I/O VCC9 through I/O VCC16 and I/O VL9 through I/O

VL16 into tri-state. Drive MULT low to enable I/O VCC9

through I/O VCC16 and I/O VL9 through I/O VL16.

Driving MULT low sets I/O VCC1 through I/O VCC8 and

I/O VL1 through I/O VL8 into tri-state.

Â±15kV ESD Protection

As with all Maxim devices, ESD-protection structures are

incorporated on all pins to protect against electrostatic

discharges encountered during handling and assembly.

The I/O VCC_ lines have extra protection against static

discharge. Maximâs engineers have developed state-of-

the-art structures to protect these pins against ESD of

Â±15kV without damage. The ESD structures withstand

high ESD in all states: normal operation, tri-state output

mode, and powered down. After an ESD event, Maximâs

E versions keep working without latchup, whereas com-

peting products can latch and must be powered down

to remove the latchup condition.

ESD protection can be tested in various ways. The

I/O VCC_ lines of the MAX13101E/ MAX13102E/

MAX13103E/MAX13108E are characterized for protec-

tion to Â±15kV using the Human Body Model.

PORT A

PORT B

I/O VL1

I/O VL2

I/O VL3

I/O VL4

I/O VL5

I/O VL6

I/O VL7

I/O VL8

I/O VL9

I/O VL10

I/O VL11

I/O VL12

I/O VL13

I/O VL14

I/O VL15

I/O VL16

MULT

MAX13108E

I/O VCC1

I/O VCC2

I/O VCC3

I/O VCC4

I/O VCC5

I/O VCC6

I/O VCC7

I/O VCC8

I/O VCC9

I/O VCC10

I/O VCC11

I/O VCC12

I/O VCC13

I/O VCC14

I/O VCC15

I/O VCC16

Figure 7. MAX13108E Multiplexing Configuration

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