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MAX13101E Datasheet, PDF (11/18 Pages) Maxim Integrated Products – 16-Channel Buffered CMOS Logic-Level Translators
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16-Channel Buffered CMOS
Logic-Level Translators
PIN
TQFN
WLP
10
C6
11
B5
12
C5
13
A6
14
B6
15, 36
A1
16, 35
F1
17
E6
18
F6
19
D5
20
E5
22
F5
23
D4
24
E4
25
F4
26
D3
27
E3
28
F3
29
D2
31
E2
32
F2
33
D1
34
E1
37
B1
38
C1
39
A2
40
B2
—
—
Pin Description—MAX13108E (continued)
NAME
FUNCTION
MULT
Multiplexing Input. Drive MULT low to enable channels 9 to 16. Driving MULT low puts
channels 1 to 8 into tri-state. Drive MULT to VCC or VL to enable channels 1 to 8. Driving
MULT to VCC or VL puts channels 9 to 16 into tri-state.
I/O VL13 Input/Output 13. Referenced to VL.
I/O VL14 Input/Output 14. Referenced to VL.
I/O VL15 Input/Output 15. Referenced to VL.
I/O VL16 Input/Output 16. Referenced to VL.
VL
Logic Supply Voltage, +1.2V ≤ VL ≤ VCC. Bypass VL to GND with a 0.1µF capacitor.
VCC Supply Voltage, +1.65V ≤ VCC ≤ +5.5V. Bypass VCC to GND with a 0.1µF capacitor.
VCC For full ESD protection, connect a 1.0µF capacitor from VCC to GND, located as close to the
VCC input as possible.
I/O VCC16 Input/Output 16. Referenced to VCC.
I/O VCC15 Input/Output 15. Referenced to VCC.
I/O VCC14 Input/Output 14. Referenced to VCC.
I/O VCC13 Input/Output 13. Referenced to VCC.
I/O VCC12 Input/Output 12. Referenced to VCC.
I/O VCC11 Input/Output 11. Referenced to VCC.
I/O VCC10 Input/Output 10. Referenced to VCC.
I/O VCC9 Input/Output 9. Referenced to VCC.
I/O VCC8 Input/Output 8. Referenced to VCC.
I/O VCC7 Input/Output 7. Referenced to VCC.
I/O VCC6 Input/Output 6. Referenced to VCC.
I/O VCC5 Input/Output 5. Referenced to VCC.
I/O VCC4 Input/Output 4. Referenced to VCC.
I/O VCC3 Input/Output 3. Referenced to VCC.
I/O VCC2 Input/Output 2. Referenced to VCC.
I/O VCC1 Input/Output 1. Referenced to VCC.
I/O VL1 Input/Output 1. Referenced to VL.
I/O VL2 Input/Output 2. Referenced to VL.
I/O VL3 Input/Output 3. Referenced to VL.
I/O VL4 Input/Output 4. Referenced to VL.
EP Exposed Pad. Connect EP to GND.
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