LTC3718_15 Datasheet, PDF (9/20 Pages) Linear Technology – Low Input Voltage DC/DC Controller for DDR/QDR Memory Termination

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OPERATIO
Main Control Loop
The LTC3718 is a current mode controller for DC/DC
step-down converters designed to operate from low input
voltages. It incorporates a boost converter with a buck
regulator.
Buck Regulator Operation
In normal operation, the top MOSFET is turned on for a
fixed interval determined by a one-shot timer OST. When
the top MOSFET is turned off, the bottom MOSFET is
turned on until the current comparator I_CMP trips, restart-
ing the one-shot timer and initiating the next cycle. Induc-
tor current is determined by sensing the voltage between
the SENSE⁺ and SENSE^– pins using the bottom MOSFET
on-resistance . The voltage on the I_TH pin sets the com-
parator threshold corresponding to inductor valley cur-
rent. The error amplifier EA adjusts this voltage by com-
paring the feedback signal V_FB1 from the output voltage
with an internal reference generated from one half of the
voltage on V_REF. If the load current increases, it causes a
drop in the feedback voltage relative to the reference. The
I_TH voltage then rises until the average inductor current
again matches the load current.
The operating frequency is determined implicitly by the
top MOSFET on-time and the duty cycle required to
maintain regulation. The one-shot timer generates an on-
time that is proportional to the ideal duty cycle, thus
holding frequency approximately constant with changes
in V_IN. The nominal frequency can be adjusted with an
external resistor R_ON.
Overvoltage and undervoltage comparators OV and UV
pull the PGOOD output low if the output feedback voltage
exits a ±10% window around the regulation point.
Furthermore, in an overvoltage condition, M1 is turned off
and M2 is turned on and held on until the overvoltage
condition clears.
Pulling the RUN/SS pin low forces the controller into its
shutdown state, turning off both M1 and M2. Releasing the
pin allows an internal 1.2µA current source to charge up an
external soft-start capacitor C_SS. When this voltage reaches
1.5V, the controller turns on and begins switching, but
with the I_TH voltage clamped at approximately 0.6V below
the RUN/SS voltage. As C_SS continues to charge, the soft-
start current limit is removed.
LTC3718
INTV_CC Power
Power for the top and bottom MOSFET drivers and most
of the internal controller circuitry is derived from the
INTV_CC pin. The top MOSFET driver is powered from a
floating bootstrap capacitor C_B. This capacitor is re-
charged from INTV_CC through an external Schottky diode
D_B when the top MOSFET is turned off.
Boost Regulator Operation
The 5V power source for INTV_CC can be provided by a
current mode, internally compensated fixed frequency
step-up switching regulator that has been incorporated
into the LTC3718.
Operation can be best understood by referring to the
Functional Diagrams. Q1 and Q2 form a bandgap refer-
ence core whose loop is closed around the output of the
regulator. The voltage drop across R5 and R6 is low
enough such that Q1 and Q2 do not saturate, even when
V_IN2 is 1V. When there is no load, V_FB2 rises slightly above
1.23V, causing V_C (the error amplifier’s output) to de-
crease. Comparator A2’s output stays high, keeping switch
Q3 in the off state. As increased output loading causes the
V_FB2 voltage to decrease, A1’s output increases. Switch
current is regulated directly on a cycle-by-cycle basis by
the V_C node. The flip-flop is set at the beginning of each
switch cycle, turning on the switch. When the summation
of a signal representing switch current and a ramp gen-
erator (introduced to avoid subharmonic oscillations at
duty factors greater than 50%) exceeds the V_C signal,
comparator A2 changes state, resetting the flip-flop and
turning off the switch. More power is delivered to the
output as switch current is increased. The output voltage,
attenuated by external resistor divider R7 and R8, appears
at the V_FB2 pin, closing the overall loop. Frequency com-
pensation is provided internally by R_C and C_C. Transient
response can be optimized by the addition of a phase lead
capacitor C_PL in parallel with R7 in applications where
large value or low ESR output capacitors are used.
As the load current is decreased, the switch turns on for
a shorter period each cycle. If the load current is further
decreased, the boost converter will skip cycles to main-
tain output voltage regulation. If the V_FB2 pin voltage is
increased significantly above 1.23V, the boost converter
will enter a low power state.
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