LTC3718_15 Datasheet, PDF (8/20 Pages) Linear Technology – Low Input Voltage DC/DC Controller for DDR/QDR Memory Termination

LTC3718
W
FU CTIO AL DIAGRA S
R_ON
V_ON
2
7 I_ON
0.7V
2.4V
t_ON
=
V_VON
I_ION
(10pF)
R
SQ
20k
+
I_CMP
I_REV
–
1.4V
V_RNG
4
×
0.7V
5.7µA
V_IN
16 V_IN1
+
C_IN
0.8V
REF
5V
REG
ON
SWITCH
LOGIC
SHDN
OV
BOOST
24
TG
23
SW1
22
SENSE⁺
21
INTV_CC
17
BG
18
PGND1
19
SENSE^–
20
PGOOD
3
C_B
M1
L1
D_B
C_VCC
+
M2
C_OUT
V_OUT
1
240k
Q2
I_THB
Q1
EA
R2
80k
V_{REF 9}
R1
40k
Q5
SS
–+
0.6V
5 ITH _RC ^CC1
3/10V_REF
UV
RUN
SHDN
OV
11/30V_REF
1.2µA
6V
0.6V
1 RUN/SS ^CSS
R3
20k
R4
40k
V_FB1
8
SGND1
6
3718 FD01
8
V_IN2 15
R5
40k
V_OUT2
R7
(EXTERNAL)
V_FB2
Q1
FB2 12
R8
(EXTERNAL)
11 SGND2
R6
40k
+
A1
g_m
–
Q2
x10
R9
30k
R10
140k
– ^COMPARATOR
A2
R_C2
RAMP
GENERATOR
Σ
+
C_C2
FF
R
Q
S
1.4MHz
OSCILLATOR
SHDN
10
SHUTDOWN
13 SW2
DRIVER
Q3
0.15Ω
14 PGND2
3718 FD02
3718fa