LTC3718_15 Datasheet, PDF (17/20 Pages) Linear Technology – Low Input Voltage DC/DC Controller for DDR/QDR Memory Termination

LTC3718
APPLICATIO S I FOR ATIO
and double check the assumed T_J in the MOSFET:
P_BOT
=
2.5V – 1.25V
2.5V


9.9A
2


2
(1.15)(0.013Ω)
= 0.18W
T_J = 50°C + (0.18W)(50°C/W) = 59°C
Now check the power dissipation of the top MOSFET at
current limit with ρ_90°C = 1.35:
( ) ( )( ) ^PTOP
=
1.25V
2.5V
2
9.9A 1.35
0.013Ω
( )( )( ) ( )( ) ²
+ 1.7 2.5V 9.9A 60pF 300kHz
= 0.87W
T_J = 50°C + (0.87W)(50°C/W) = 93.5°C
C_IN is chosen for an RMS current rating of about 6A at
temperature. The output capacitors are chosen for a low
ESR of 0.005Ω to minimize output voltage changes due to
inductor ripple current and load steps. The ripple voltage
will be only:
∆V_OUT(RIPPLE) = ∆I_L(MAX) (ESR)
= (2.6A) (0.005Ω) = 13mV
However, a 0A to 6A load step will cause an output change
of up to:
∆V_OUT(STEP) = ∆I_LOAD (ESR) = (6A) (0.005Ω) = 30mV
The inductor for the boost converter is selected by first
choosing an allowable ripple current. The boost converter
will be operating in discontinous mode. If we select a ripple
current of 170mA for the boost converter, then:
L=

3.3V_1−
3.3V ^
5V 
= 4.7µH
(170mA)(1.4MHz)
The complete circuit is shown in Figure 7.
PGOOD
R_PG
100k
R_R2
39.2k
C_SS
0.1µF
1
RUN/SS
24
BOOST
R_R1
10k
R_C
4.75k
C2
C1 820pF 100pF
R_ON
237k
2
V_ON
3
PGOOD
23
TG
22
SW1
4
V_RNG
SENSE^{+ 21}
5
I_TH
SENSE^{– 20}
6
SGND1
19
PGND1
7
LTC3718
18
I_ON
BG
8
V_FB1
17
INTV_CC
9
V_REF
16
V_IN1
10
SHDN
15
V_IN2
11
SGND2
14
PGND2
R_F1
12.1k
12
V_FB2
R_F3
10k
13
SW2
R_F2
37.4k
C_F4
1000pF
D_B
CMDSH-3
C_B
0.33µF
C_IN1
22µF
×2
M1
IRF7811A
D1
B340A
L1
1µH
M2
IRF7811A
D2
B340A
V_IN
2.5V
C_IN2
330µF
C_OUT
270µF
×2
V_OUT
1.25V
± 6A
C_IN2
4.7µF
C_VCC1
10µF
L2
4.7µH
D3
MBR0520
3718 F07
Figure 7. Design Example: 1.25V/±6A at 300kHz from 2.5V
3718fa
17