LTC3718_15 Datasheet, PDF(14/20 Page) Linear Technology – Low Input Voltage DC/DC Controller for DDR/QDR Memory Termination

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LTC3718_15 Datasheet, PDF (14/20 Pages) Linear Technology – Low Input Voltage DC/DC Controller for DDR/QDR Memory Termination

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LTC3718

APPLICATIO S I FOR ATIO

due to a dropping input voltage for example, then the

output will drop out of regulation. The minimum input

voltage to avoid dropout is:

VIN(MIN)

VOUT

tON

+ tOFF(MIN)

tON

Output Voltage Programming

When VFB is connected to VOUT, the output voltage is

regulated to one half of the voltage at the VREF pin. A

resistor connected between VFB and VOUT can be used to

further adjust the output voltage according to the follow-

ing equation:

VOUT

ï£«

VREF ï£ï£¬

60k + RFB ï£¶

120k ï£¸ï£·

If VREF exceeds 3V, resistors should be placed in series

with the VREF pin and the VFB pin to avoid exceeding the

input common mode range of the internal error amplifier.

To maintain the VOUT = VREF/2 relationship, the resistor in

series with the VREF pin should be made twice as large as

the resistor in series with the VFB pin.

VOUT

RFB

249k

VFB1

VREF

RFB

499k

LTC3718

VREF

3718 F04

Figure 4

External Gate Drive Buffers

The LTC3718 drivers are adequate for driving up to about

30nC into MOSFET switches with RMS currents of 50mA.

Applications with larger MOSFET switches or operating at

frequencies requiring greater RMS currents will benefit

from using external gate drive buffers such as the LTC1693.

BOOST

INTVCC

FMMT619

10â¦

GATE

OF M1

10â¦

GATE

OF M2

FMMT720

PGND

3718 F05

Figure 5. Optional External Gate Driver

Alternately, the external buffer circuit shown in Figure 5

can be used. Note that the bipolar devices reduce the

signal swing at the MOSFET gate.

Soft-Start and Latchoff with the RUN/SS Pin

The RUN/SS pin provides a means to shut down the

LTC3718 as well as a timer for soft-start and overcurrent

latchoff. Pulling the RUN/SS pin below 0.8V puts the

LTC3718 into a low quiescent current shutdown

(IQ < 30ÂµA). Releasing the pin allows an internal 1.2ÂµA

current source to charge up the external timing capacitor

CSS. If RUN/SS has been pulled all the way to ground,

there is a delay before starting of about:

( ) tDELAY

1.5V

1.2ÂµA

C SS

1.3s/ÂµF

C SS

When the voltage on RUN/SS reaches 1.5V, the LTC3718

begins operating with a clamp on ITH of approximately

0.9V. As the RUN/SS voltage rises to 3V, the clamp on ITH

is raised until its full 2.4V range is available. This takes an

additional 1.3s/ÂµF, during which the load current is folded

back. During start-up, the maximum load current is re-

duced until either the RUN/SS pin rises to 3V or the output

reaches 75% of its final value. The pin can be driven from

logic as shown in Figure 6. Diode D1 reduces the start

delay while allowing CSS to charge up slowly for the soft-

start function.

INTVCC

3.3V OR 5V

VIN

RUN/SS

RSS*

D2* RUN/SS

CSS

(6a)

3718 F06

*OPTIONAL TO OVERRIDE

OVERCURRENT LATCHOFF

(6b)

Figure 6. RUN/SS Pin Interfacing with Latchoff Defeated

After the controller has been started and given adequate

time to charge up the output capacitor, CSS is used as a

short-circuit timer. After the RUN/SS pin charges above

4V, if the output voltage falls below 75% of its regulated

value, then a short-circuit fault is assumed. A 1.8ÂµA cur-

rent then begins discharging CSS. If the fault condition

3718fa

▷