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LTC3300-1 Datasheet, PDF (6/44 Pages) Linear Technology – High Effciency Bidirectional Multicell Battery Balancer
LTC3300-1
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
Cju3nc=ti1o0n.8teV,mCp2er=a7tu.r2eV,raCn1g=e,3o.6thV,erVw–i=se0sV,peucnilfeicsastoiothnesrawrieseatnToAte=d.25°C. (Note 2) BOOST+ = 25.2V, C6 = 21.6V, C5 = 18V, C4 = 14.4V,
SYMBOL
PARAMETER
VOL
Digital Output Voltage Low
IOH
Digital Output Current High
Current Mode Digital I/O Specifications
IIL1
Digital Input Current Low
IIH1
Digital Input Current High
IOH1
Digital Output Current High
IOL1
Digital Output Current Low
CONDITIONS
Pin SDO, Sinking 500µA; VMODE = VREG; Read
Pin SDO at 6V
Pin
Pin
Pin
Pin
SSSCDCDSKBOI,IIIV;;, VVMTMMOODOOSEDD=EE=V==V–VV–,,––RWearidte
Pin
Pin
Pin
Pin
SSSCDCDSKBOI,IIIV;;, VVMTMMOODOOSEDD=EE=V==V–VV–,,––RWearidte
Pin CSBO; TOS = V–
Pin SCKO; TOS = V–
Pin SDOI, TOS = V–, Write
Pin SDI, VMODE = V–, Read
Pin CSBO; TOS = V–
Pin SCKO; TOS = V–
Pin SDOI, TOS = V–, Write
Pin SDI, VMODE = V–, Read
MIN
l
l
TYP MAX UNITS
0.3
V
100
nA
l –1500 –1250 –1000
µA
l
–5
–2.5
0
µA
l
–5
–2.5
0
µA
l
0
2.5
5
µA
l
–5
–2.5
0
µA
l –1500 –1250 –1000
µA
l –1500 –1250 –1000
µA
l 1000 1250 1500
µA
l
0
2.5
5
µA
l 1000 1250
µA
l 1000 1250
µA
l
–1000
µA
l 1000 1250
µA
l
0
2.5
5
µA
l
0
2.5
5
µA
l
–5
µA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3300-1 is tested under pulsed load conditions such
that TJ ≈ TA. The LTC3300I-1 is guaranteed over the –40°C to 125°C
operating junction temperature range and the LTC3300H-1 is guaranteed
over the –40°C to 150°C operating junction temperature. High junction
temperatures degrade operating lifetimes; operating lifetime is derated
for junction temperatures greater than 125°C. Note that the maximum
ambient temperature consistent with these specifications is determined by
specific operating conditions in conjunction with board layout, the rated
package thermal impedance and other environmental factors. The junction
temperature (TJ, in °C) is calculated from the ambient temperature
(TA, in °C) and power dissipation (PD, in Watts) according to the formula:
TJ = TA + (PD • θJA)
where θJA (in °C/W) is the package thermal impedance.
Note 3: When balancing more than one cell at a time, the individual cell
supply currents can be calculated from the values given in the table as
follows: First add the appropriate table entries cell by cell for the balancers
that are on. Second, for each additional balancer that is on, subtract 70µA
from the resultant sums for C1, C2, C3, C4, and C5, and 450µA from the
resultant sum for C6. For example, if all six balancers are on, the resultant
current for C1 is [250 – 70 + 70 + 70 + 70 + 70 – 5(70)]µA = 110µA and
for C6 is [560 + 560 + 560 + 560 + 560 + 740 – 5(450)]µA = 1290µA.
Note 4: Dynamic supply current is higher due to gate charge being
delivered at the switching frequency during active balancing. See Gate
Drivers/Gate Drive Comparators and Voltage Regulator in the Operation
section for more information on estimating these currents.
Note 5: The zero current sense voltages given in the table are DC
thresholds. The actual zero current sense voltage seen in application will
be closer to zero due to the slew rate of the winding current and the finite
delay of the current sense comparator.
Note 6: The mid-range value is the average of the minimum and maximum
readings within the group of six.
Note 7: This IC includes overtemperature protection intended to protect
the device during momentary overload conditions. The maximum junction
temperature may be exceeded when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may result in device degradation or failure.
33001f
6
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