LTC3300-1 Datasheet, PDF (23/44 Pages) Linear Technology – High Effciency Bidirectional Multicell Battery Balancer

LTC3300-1
OPERATION
the WDT pin from high voltage. The secondary winding
OVP thresholds are given by:
V_{SEC|OVP(RISING)} = 1.4V + 1.2V • (R_{SEC_OVP}/R_TONS)
V_{SEC|OVP(FALLING)} = 1.4V + 1.05V • (R_{SEC_OVP}/R_TONS)
This comparator will protect the LTC3300-1 application
circuit if the secondary winding connection to the battery
stack is lost while balancing and the secondary winding
voltage is still increasing as a result of that balancing. The
balance command remains stored in memory, and active
balancing will resume where it left off if the stack voltage
subsequently falls to a safer level.
Single Transformer Application (CTRL = V_REG)
Figure 7 shows a fully populated LTC3300-1 application
employing all six balancers with a single shared custom
transformer. In this application, the transformer has six
primary windings coupled to a single secondary winding.
Only one balancer can be active at a given time as all six
share the secondary gate driver G1S and secondary current
sense input I1S. The unused gate driver outputs G2S-G6S
must be left floating and the unused current sense inputs
I2S-I6S should be connected to V^–. Any balance command
which attempts to operate more than one balancer at a time
will be ignored. This application represents the minimum
component count active balancer achievable.
SERIAL PORT OPERATION
Overview
The LTC3300-1 has an SPI bus compatible serial port.
Several devices can be daisy chained in series. There are
two sets of serial port pins, designated as low side and
high side. The low side and high side ports enable devices
to be daisy chained even when they operate at different
power supply potentials. In a typical configuration, the
positive power supply of the first, bottom device is con-
nected to the negative power supply of the second, top
device. When devices are stacked in this manner, they can
be daisy chained by connecting the high side port of the
bottom device to the low side port of the top device. With
this arrangement, the master writes to or reads from the
cascaded devices as if they formed one long shift register.
The LTC3300-1 translates the voltage level of the signals
between the low side and high side ports to pass data up
and down the battery stack.
Physical Layer
On the LTC3300-1, seven pins comprise the low side and
high side ports. The low side pins are CSBI, SCKI, SDI
and SDO. The high side pins are CSBO, SCKO and SDOI.
CSBI and SCKI are always inputs, driven by the master
or by the next lower device in a stack. CSBO and SCKO
are always outputs that can drive the next higher device
in a stack. SDI is a data input when writing to a stack of
devices. For devices not at the bottom of a stack, SDI is a
data output when reading from the stack. SDOI is a data
output when writing to and a data input when reading from
a stack of devices. SDO is an open-drain output that is
only used on the bottom device of a stack, where it may
be tied with SDI, if desired, to form a single, bidirectional
port. The SDO pin on the bottom device of a stack requires
a pull-up resistor. For devices up in the stack, SDO should
be tied to the local V^– or left floating.
To communicate between daisy-chained devices, the high
side port pins of a lower device (CSBO, SCKO and SDOI)
should be connected through high voltage diodes to the
respective low side port pins of the next higher device
(CSBI, SCKI and SDI). In this configuration, the devices
communicate using current rather than voltage. To signal
a logic high from the lower device to the higher device,
the lower device sinks a smaller current from the higher
device pin. To signal a logic low, the lower device sinks
a larger current. Likewise, to signal a logic high from
the higher device to the lower device, the higher device
sources a larger current to the lower device pin. To signal
a logic low, the higher device sources a smaller current.
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