LTC3335_15 Datasheet, PDF (5/28 Pages) Linear Technology – Nanopower Buck-Boost DC/DC with Integrated Coulomb Counter

LTC3335
Electrical Characteristics The l denotes the specifications which apply over the full operating junction
temperature range, otherwise specifications are at T_A = 25°C (Note 2). BAT = PBAT = 3.6V, GNDA = GNDD = PGND = 0V, V_OUT = PV_OUT.
PARAMETER
CONDITIONS
MIN
TYP
MAX UNITS
Digital Input Low Voltage
Digital Output High Voltage
Digital Output Low Voltage
For Pins EN, IPK[2:0], OUT[2:0]
For Pins SDA, SCL
For Pins PGOOD, IRQ; 1µA Out of Pin
For Pins PGOOD, IRQ; 1µA Into Pin
For Pin SDA; 3mA Into Pin
l
l DV_CC – 0.5
l
0.5
V
30
%DV_CC
V
0.5
V
0.4
V
Input High Current
For Pins EN, IPK[2:0], OUT[2:0], SDA, SCL
0
10
nA
Input Low Current
For Pins EN, IPK[2:0], OUT[2:0], SDA, SCL
I²C Timing Characteristics (See Figure 1)
I²C address
0
10
nA
1100100
[R/W]
Clock Operating Frequency
f_SCL
Bus Free Time Between
t_BUF
STOP/START
400
kHz
1.3
µs
Repeated START Set-Up Time
Hold Time (Repeated) START
Condition
t_SU,STA
t_HD,STA
600
ns
600
ns
Set-Up Time for STOP Condition
Data Set-Up Time Input
Data Hold Time Input
Data Hold Time Output
Clock Data Fall Time
Clock Data Rise Time
Clock LOW Period
Clock HIGH Period
Spike Suppression Time
t_SU,STO
t_SU,DAT
t_HD,DATI
t_HD,DATO
t_f
t_r
t_LOW
t_HIGH
t_SP
600
ns
100
ns
0
µs
0
0.9
µs
20
300
ns
20
300
ns
1.3
µs
0.6
µs
50
ns
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3335 is tested under pulsed load conditions such that T_J ≈
T_A. The LTC3335E is guaranteed to meet specifications from 0°C to 85°C.
Specifications over the –40°C to 125°C operating junction temperature
range are assured by design, characterization, and correlation with statistical
process controls. The LTC3335I is guaranteed over the –40°C to 125°C
operating junction temperature range. Note that the maximum ambient
temperature consistent with these specifications is determined by specific
operating conditions in conjunction with board layout, the rated package
thermal impedance, and other environmental factors.
Note 3: T_J is calculated from the ambient T_A and power dissipation P_D
according to the following formula: T_J = T_A + (P_D • θ_JA).
Note 4: Dynamic supply current is higher due to gate charge being
delivered at the switching frequency.
Note 5: The PGOOD Falling Threshold is specified as a percentage of the
average of the measured sleep and wake-up thresholds for each selected
output. The PGOOD rising threshold is equal to the sleep threshold. See
Regulated Output Voltage specification.
Note 6: For the 100mA I_PEAK setting, the value given in the table is
measured in a closed-loop set-up with a 100µH inductor, a 3.6V BAT
voltage, and the LTC3335 switching. For the other seven I_PEAK settings,
the values given in the table are calculated from an open-loop DC
measurement of I_PEAK (LTC3335 not switching), the propagation delay of
the I_PEAK comparator, and the recommended inductor value for each I_PEAK
setting.
Note 7: I_ZERO measurements are performed when the LTC3335 is not
switching. The values seen in operation will be slightly lower due to the
propagation delay of the comparators
Note 8: The equivalent charge of an LSB in the accumulated charge
register C depends on the I_PEAK setting and the internal pre-scaling
factor M. See Choosing Coulomb Counter Prescaler M section for more
information. 1mA • hr = 3.6A • s = 3.6C.
Note 9: The values given in the table are for applications using the
recommended inductor value for each I_PEAK setting.
Note10: The specified accuracy of q_LSB in percent is better than that of the
corresponding I_PEAK because the full-scale ON time of the AC(ON) time
measurement is internally adjusted to compensate for errors in the actual
I_PEAK value. The Total Charge Error specified includes any inaccuracy in
q_LSB.
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