LTC3861-1 Datasheet, PDF (28/36 Pages) Linear Technology – Dual, Multiphase Step-Down Voltage Mode DC/DC Controller with Accurate Current Sharing

LTC3861-1
Applications Information
Inductor
The inductor in a typical LTC3861-1 circuit is chosen for
a specific ripple current and saturation current. Given an
input voltage range and an output voltage, the inductor
value and operating frequency directly determine the
ripple current. The inductor ripple current in the buck
mode is:
ΔI_L
=
V_OUT
(f)(L)
⎛
⎝⎜
1–
V_OUT
V_IN
⎞
⎠⎟
Lower ripple current reduces core losses in the inductor,
ESR losses in the output capacitors and output voltage
ripple. Thus highest efficiency operation is obtained at
low frequency with small ripple current. To achieve this
however, requires a large inductor.
A reasonable starting point is to choose a ripple cur-
rent between 20% and 40% of I_O(MAX). Note that the
largest ripple current occurs at the highest V_IN. To guar-
antee that ripple current does not exceed a specified
maximum, the inductor in buck mode should be chosen
according to:
L
≥
f
V_OUT
ΔI_L(MAX)
⎛
⎜
⎝
1–
V_OUT
V_IN(MAX)
⎞
⎟
⎠
Power MOSFET Selection
The LTC3680 requires at least two external N-channel power
MOSFETs per channel, one for the top (main) switch and
one or more for the bottom (synchronous) switch. The
number, type and on-resistance of all MOSFETs selected
take into account the voltage step-down ratio as well as
the actual position (main or synchronous) in which the
MOSFET will be used. A much smaller and much lower
input capacitance MOSFET should be used for the top
MOSFET in applications that have an output voltage that
is less than one-third of the input voltage. In applications
where V_IN >> V_OUT, the top MOSFETs’ on-resistance is
normally less important for overall efficiency than its
input capacitance at operating frequencies above 300kHz.
MOSFET manufacturers have designed special purpose
devices that provide reasonably low on-resistance with
significantly reduced input capacitance for the main switch
application in switching regulators.
Selection criteria for the power MOSFETs include the on-
resistance R_DS(ON), input capacitance, breakdown voltage
and maximum output current.
For maximum efficiency, on-resistance R_DS(ON) and input
capacitance should be minimized. Low R_DS(ON) minimizes
conduction losses and low input capacitance minimizes
switching and transition losses. MOSFET input capacitance
is a combination of several components but can be taken
from the typical gate charge curve included on most data
sheets (Figure 14).
The curve is generated by forcing a constant-input cur-
rent into the gate of a common source, current source
loaded stage and then plotting the gate voltage versus
time. The initial slope is the effect of the gate-to-source
and the gate-to-drain capacitance. The flat portion of the
curve is the result of the Miller multiplication effect of the
drain-to-gate capacitance as the drain drops the voltage
V_IN
MILLER EFFECT
V_GS
a
b
Q_IN
C_MILLER = (Q_B – Q_A)/V_DS
V
+
+
– ^VDS
V_GS
–
38611 F14
Figure 14. Gate Charge Characteristic
38611f
28