LTC3861-1 Datasheet, PDF (21/36 Pages) Linear Technology – Dual, Multiphase Step-Down Voltage Mode DC/DC Controller with Accurate Current Sharing

LTC3861-1
Applications Information
want the filter RC time constant to match the L/DCR time
constant, we also want the filter RC time constant to drop
with increasing temperature. Typically, the inductance will
also have a small negative TC.
The ISNSP and ISNSN pins are the inputs to the current
comparators. The common mode range of the current
comparators is –0.3V to V_CC – 0.5V. Continuous linear
operation is provided throughout this range, allowing
output voltages between 0.6V (the reference input to the
error amplifiers) and V_CC – 0.5V. The maximum output
voltage is lower than V_CC to account for output ripple and
output overshoot. The maximum differential current sense
input (V_ISNSP – V_ISNSN) is 50mV.
The high impedance inputs to the current comparators
allow accurate DCR sensing. However, care must be taken
not to float these pins during normal operation.
Filter components mutual to the sense lines should be
placed close to the LTC3861-1, and the sense lines should
run close together to a Kelvin connection underneath the
current sense element (shown in Figure 6). Sensing cur-
rent elsewhere can effectively add parasitic inductance
and capacitance to the current sense element, degrading
the information at the sense terminals and making the
programmed current limit unpredictable. If low value
(<5mΩ) sense resistors are used, verify that the signal
across C_F resembles the current through the inductor,
and reduce R_F to eliminate any large step associated with
the turn-on of the primary switch. If DCR sensing is used
(Figure 5b), sense resistor R1 should be placed close to
the switching node, to prevent noise from coupling into
sensitive small-signal nodes. The capacitor C1 should be
placed close to the IC pins.
Multiphase Operation
When the LTC3861-1 is used in a single output, multiphase
application, the slave error amplifiers must be disabled
by connecting their FB pins to V_CC. All current limits
should be set to the same value using only one resistor
to SGND per IC. I_LIM2 should then be connected to V_CC.
These connections are shown in Table 4. In a multiphase
application all COMP, RUN and TRACK/SS pins must be
connected together.
Table 4. Multiphase Configurations
CH1
CH2
FB1
FB2
Master
Slave
On
Off
(FB = V_CC)
Slave
Slave
Off
Off
(FB = V_CC) (FB = V_CC)
Slave Additional Off
On
Output (FB = V_CC)
I_LIM1
Resistor
to GND
Resistor
to GND
Resistor
to GND
I_LIM2
V_CC
V_CC
Resistor
to GND
For output loads that demand high current, multiple
LTC3861-1s can be daisychained to run out-of-phase to
provide more output current without increasing input and
output voltage ripple. The CLKIN pin allows the LTC3861-1
to synchronize to the CLKOUT signal of another LTC3861-1.
The CLKOUT signal can be connected to the CLKIN pin of
the following LTC3861-1 stage to line up both the frequency
and the phase of the entire system. Tying the PHSMD pin to
V_CC, SGND or floating it generates a phase difference
(between CLKIN and CLKOUT) of 240°, 60° or 90°
respectively, and a phase difference (between CH1 and
CH2) of 120°, 180° or 180°. Figure 7 shows the PHSMD
connections necessary for 3-, 4-, 6- or 12-phase operation.
A total of twelve phases can be daisychained to run simul-
taneously out-of-phase with respect to each other.
TO SENSE FILTER,
NEXT TO THE CONTROLLER
INDUCTOR OR R_SENSE
C_OUT
38611 F06
Figure 6. Sense Lines Placement with Inductor or Sense Resistor
38611f
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