LTC3861-1 Datasheet, PDF (14/36 Pages) Linear Technology – Dual, Multiphase Step-Down Voltage Mode DC/DC Controller with Accurate Current Sharing

LTC3861-1
Operation (Refer to Functional Diagram)
power MOSFET to PGND is greater than 3/4 the positive
OC threshold, the NOC comparator trips and shuts off the
bottom power MOSFET to protect it from being destroyed.
This scenario can happen when the LTC3861-1 tries to
start into a precharged load higher than the OV threshold.
As a result, the bottom switch turns on until the amount
of reverse current trips the NOC comparator threshold.
Nonsynchronous Start-Up and Prebiased Output Load
The LTC3861-1 will start up with seven cycles of
nonsynchronous operation before switching over to a
forced continuous mode of operation. The PWM output will
be in a three-state condition until start-up. The controller
will start the seven nonsynchronous cycles if it is not in
an overcurrent or prebiased condition, and if the COMP
pin voltage is higher than 500mV, or if the TRACK/SS
pin voltage is higher than 580mV. During the seven
nonsynchronous cycles the PWM latch is set high at the
beginning of the clock cycle, if COMP > 0.5V, causing the
PWM output to transition from three-state to V_CC. The
latch is reset when the PWM ramp exceeds the COMP
voltage, causing the PWM output to transition from V_CC
to three-state followed immediately by a 20ns three-state
to ground pulse. The 7-cycle nonsynchronous mode of
operation is enabled at initial start-up and also during a
restart from a fault condition. In multiphase operation,
where all the TRACK/SS should be connected together,
an overcurrent event on one channel will discharge the
soft-start capacitor. After 32768 cycles, it will synchronize
the restart of all channels in to the nonsynchronous mode
of operation.
The LTC3861-1 can safely start-up into a prebiased output
without discharging the output capacitors. A prebias
is detected when the FB pin voltage is higher than the
TRACK/SS or the internal soft-start voltage. A prebiased
condition will force the COMP pin to be held low, and will
three-state the PWM output. The prebiased condition is
cleared when the TRACK/SS or the internal soft-start voltage
is higher than the FB pin voltage or 580mV, whichever is
lower. If the output prebias is higher than the OV threshold
then the PWM output will be low, which will pull the output
back in to the regulation window.
14
Internal Soft-Start
By default, the start-up of each channel’s output voltage
is normally controlled by an internal soft-start ramp. The
internal soft-start ramp represents a noninverting input
to the error amplifier. The FB pin is regulated to the lower
of the error amplifier’s three noninverting inputs (the
internal soft-start ramp for that channel, the TRACK/SS
pin or the internal 600mV reference). As the ramp volt-
age rises from 0V to 0.6V over approximately 2ms, the
output voltage rises smoothly from its prebiased value
to its final set value.
Soft-Start and Tracking Using TRACK/SS Pin
The user can connect an external capacitor greater than
10nF to the TRACK/SS pin for the relevant channel to
increase the soft-start ramp time beyond the internally
set default. The TRACK/SS pin represents a noninverting
input to the error amplifier and behaves identically to the
internal ramp described in the previous section. An internal
2.5µA current source charges the capacitor, creating a
voltage ramp on the TRACK/SS pin. The TRACK/SS pin is
internally clamped to 1.2V. As the TRACK/SS pin voltage
rises from 0V to 0.6V, the output voltage rises smoothly
from 0V to its final value in:
C_SSµF • 0.6V _seconds
2.5µA
Alternatively, the TRACK/SS pin can be used to force the
start-up of V_OUT to track the voltage of another supply.
Typically this requires connecting the TRACK/SS pin to
an external divider from the other supply to ground (see
the Applications Information section). It is only possible
to track another supply that is slower than the internal
soft-start ramp. The TRACK/SS pin also has an internal
open-drain NMOS pull-down transistor that turns on to
reset the TRACK/SS voltage when the channel is shut
down (RUN = 0V or V_CC < UVLO threshold) or during an
OC fault condition.
In multiphase operation, one master error amplifier is used
to control all of the PWM comparators. The FB pins for
the unused error amplifiers are connected to V_CC in order
to three-state these amplifier outputs and the COMP pins
are connected together. When the FB pin is tied to V_CC,
the internal 2.5µA current source on the TRACK/SS pin
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