1048C Datasheet, PDF (9/12 Pages) Lattice Semiconductor – In-System Programmable High Density PLD

Specifications ispLSI 1048C/883
Maximum GRP Delay vs GLB Loads
11
10
9
8
7
6
5
4
3
1
4
8
12
GLB Loads
ispLSI 1048C-50
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0126A-48C-80-ispmil
Power Consumption
Power consumption in the ispLSI 1048C/883 device used. Figure 3 shows the relationship between power
depends on two primary factors: the speed at which the and operating speed.
device is operating, and the number of Product Terms
Figure 3. Typical Device Power Consumption vs fmax
250
ispLSI 1048C
200
150
100
50
0 10 20 30 40 50 60 70 80
fmax (MHz)
Notes: Configuration of Twelve 16-bit Counters
Typical Current at 5V, 25˚C
ICC can be estimated for the ispLSI 1048C using the following equation:
ICC = 73 + (# of PTs * 0.23) + (# of nets * Max. freq * 0.010) where:
# of PTs = Number of Product Terms used in design
# of nets = Number of Signals used in device
Max. freq = Highest Clock Frequency to the device
The ICC estimate is based on typical conditions (VCC = 5.0V, room temperature) and an assumption of 2 GLB
loads on average exists. These values are for estimates only. Since the value of ICC is sensitive to operating
conditions and the program in the device, the actual ICC should be verified.
0127A-48C-80-isp
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