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1032E1111 Datasheet, PDF (4/16 Pages) Lattice Semiconductor – High-Density Programmable Logic
Specifications ispLSI and pLSI 1032E
Switching Test Conditions
Input Pulse Levels
Input Rise and Fall Time
10% to 90%
Input Timing Reference Levels
Output Timing Reference Levels
Output Load
3-state levels are measured 0.5V from
steady-state active level.
GND to 3.0V
-125
≤ 2 ns
Others
≤ 3 ns
1.5V
1.5V
See Figure 2
Table 2-0003/1032E
Figure 2. Test Load
Device
Output
Output Load Conditions (see Figure 2)
+ 5V
R1
R2
Test
Point
CL*
TEST CONDITION
A
Active High
B
Active Low
Active High to Z
C at VOH -0.5V
Active Low to Z
at VOL+0.5V
R1
470Ω
∞
470Ω
∞
R2
390Ω
390Ω
390Ω
390Ω
CL
35pF
35pF
35pF
5pF
470Ω
390Ω 5pF
Table 2-0004/1032E
*CL includes Test Fixture and Probe Capacitance.
0213a
DC Electrical Characteristics
Over Recommended Operating Conditions
SYMBOL
PARAMETER
CONDITION
MIN. TYP.3 MAX. UNITS
VOL
Output Low Voltage
IOL= 8 mA
–
–
0.4
V
VOH
Output High Voltage
IOH = -4 mA
2.4
–
–
V
IIL
Input or I/O Low Leakage Current
0V ≤ VIN ≤ VIL (Max.)
–
–
-10 µA
IIH
Input or I/O High Leakage Current
3.5V ≤ VIN ≤ VCC
–
–
10
µA
IIL-isp ispEN Input Low Leakage Current
0V ≤ VIN ≤ VIL
–
– -150 µA
IIL-PU I/O Active Pull-Up Current
0V ≤ VIN ≤ VIL
–
– -150 µA
IOS1
Output Short Circuit Current
VCC= 5V, VOUT = 0.5V
–
– -200 mA
ICC2, 4 Operating Power Supply Current
VIL= 0.5V, VIH = 3.0V
Commercial
–
190 –
mA
fCLOCK = 1 MHz
Industrial
–
190 –
mA
Table 2-0007/1032E
1. One output at a time for a maximum duration of one second. VOUT = 0.5V was selected to avoid test problems
by tester ground degradation. Characterized but not 100% tested.
2. Measured using eight 16-bit counters.
3. Typical values are at VCC= 5V and TA= 25°C.
4. Maximum ICC varies widely with specific device configuration and operating frequency. Refer to the Power Consumption
section of this data sheet and Thermal Management section of the Lattice Semiconductor Data Book or CD-ROM to
estimate maximum ICC.
4