PALCE20V8 Datasheet, PDF (21/27 Pages) Advanced Micro Devices – EE CMOS 24-Pin Universal Programmable Array Logic

ENDURANCE CHARACTERISTICS
The PALCE20V8 is manufactured using Vantis’ advanced electrically-erasable (EE) CMOS process.
This technology uses an EE cell to replace the fuse link used in bipolar parts. As a result, the
device can be erased and reprogrammed—a feature which allows 100% testing at the factory.
Symbol
t_DR
N
Parameter
Min Pattern Data Retention Time
Max Reprogramming Cycles
Test Conditions
Max Storage Temperature
Max Operating Temperature
Normal Programming Conditions
Value
10
20
100
Unit
Years
Years
Cycles
ROBUSTNESS FEATURES
The PALCE20V8X-X/5 have some unique features that make them extremely robust, especially
when operating in high-speed design environments. Pull-up resistors on inputs and I/O pins
cause unconnected pins to default to a known state. Input clamping circuitry limits negative
overshoot, eliminating the possibility of false clocking caused by subsequent ringing. A special
noise filter makes the programming circuitry completely insensitive to any positive overshoot
that has a pulse width of less than about 100 ns for the /5 versions.
PALCE20V8 Family
21