PALCE20V8 Datasheet, PDF (15/27 Pages) Advanced Micro Devices – EE CMOS 24-Pin Universal Programmable Array Logic

CAPACITANCE ¹
Parameter
Symbol
Parameter Description
Test Conditions
Typ Unit
C_IN
Input Capacitance
C_OUT
Output Capacitance
V_IN = 2.0 V
V_OUT = 2.0 V
V_CC = 5.0 V, T_A = 25°C,
f = 1 MHz
5
pF
8
pF
Note:
1. These parameters are not 100% tested, but are evaluated at initial characterization and at any time the design is modified where
capacitance may be affected.
SWITCHING CHARACTERISTICS OVER COMMERCIAL OPERATING RANGES ¹
Parameter
Symbol
Parameter Description
-15
-25
Min Max Min Max Unit
t_PD
Input or Feedback to Combinatorial Output
t_S
Setup Time from Input or Feedback to Clock
t_H
Hold Time
t_CO
Clock to Output
t_WL
LOW
Clock Width
t_WH
HIGH
Maximum
External Feedback
1/(t_S+t_CO)
f_MAX
Frequency
Internal Feedback (f_CNT) 1/(t_S+t_CF) (Note 3)
(Note 2)
No Feedback
1/(t_WH+t_WL)
t_PZX
OE to Output Enable
t_PXZ
OE to Output Disable
t_EA
Input to Output Enable Using Product Term Control
t_ER
Input to Output Disable Using Product Term Control
15
25
ns
12
15
ns
0
0
ns
10
12
ns
8
12
ns
8
12
ns
45.5
37
MHz
50
40
MHz
62.5
41.6
MHz
15
20
ns
15
20
ns
15
25
ns
15
25
ns
Notes:
1. See “Switching Test Circuit” for test conditions.
2. These parameters are not 100% tested, but are calculated at initial characterization and at any time the design is modified where
frequency may be affected.
3. t_CF is a calculated value and is not guaranteed. t_CF can be found using the following equation:
t_CF = 1/f_MAX (internal feedback) – t_S.
PALCE20V8H-15/25 Q-15/25 (Com’l)
15