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| IS66WVE2M16DBLL Datasheet, PDF (8/28 Pages) Integrated Silicon Solution, Inc – 3.0V Core Async/Page PSRAM | |||
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Figure 3. Asynchronous WRITE operation
Address
tWC = WRITE cycle Time
VALID
ADDRESS
DQ0-
DQ15
CE#
UB#/LB#
WE#
OE#
< tCEM
IS66WVE2M16DBLL
VALID
DATA
Rev.A | May 2012
www.issi.com - SRAM@issi.com
8
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