IS66WVE2M16DBLL Datasheet, PDF (4/28 Pages) Integrated Silicon Solution, Inc – 3.0V Core Async/Page PSRAM

IS66WVE2M16DBLL
Signal Descriptions
All signals for the device are listed below in Table 1.
Table 1. Signal Descriptions
Symbol
VDD
VDDQ
VSS
VSSQ
DQ0~DQ15
A0~A20
LB#
UB#
CE#
OE#
WE#
ZZ#
Type
Power Supply
Power Supply
Power Supply
Power Supply
Input / Output
Input
Input
Input
Input
Input
Input
Input
Description
Core Power supply (2.7V~3.6V)
I/O Power supply (2.7V~3.6V)
All VSS supply pins must be connected to Ground
All VSSQ supply pins must be connected to Ground
Data Inputs/Outputs (DQ0~DQ15)
Address Input(A0~A20)
Lower Byte select
Upper Byte select
Chip Enable/Select
Output Enable
Write Enable
Sleep enable : When ZZ# is LOW, the CR can be loaded, or the device
can enter one of two low-power modes ( DPD or PAR).
Rev.A | May 2012
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