IS61QDPB41M18A Datasheet, PDF (6/33 Pages) Integrated Silicon Solution, Inc – 512Kx36 and 1Mx18 configuration available

IS61QDPB41M18A/A1/A2
IS61QDPB451236A/A1/A2
ODT (On Die Termination)
On Die Termination (ODT) is a feature that allows a SRAM to change input resistive termination condition by ODT pin
which function can have three status, High, Low, and Floating. Each status can have different ODT termination value
that tracks the value of RQ (Refer to the table of Fig1) and ODT of QUADP is always turned on during the read and
write function after ODT level to connect with ODT resistor is forced.
Fig1. Functional representation of ODT
VDDQ
VDDQ VDDQ
ODT=L ODT=H ODT=Floating
R1x2
R2x2
R3x2
R1x2
R2x2
PAD
R3x2
ODT=L ODT=H ODT=Floating
VSS
VSS
VSS
R1
R2
R3
Option1³
0.3x
RQ¹
0.6x
RQ²
0.6x
RQ²
Option2⁴
ODT
disable
0.6x
RQ²
ODT
disable
Notes
1. Allowable range of RQ to guarantee impedance matching a tolerance of ±20% is 175Ω<RQ<350Ω.
2. Allowable range of RQ to guarantee impedance matching a tolerance of ±20% is 175Ω<RQ<250Ω.
3. ODT control pin is connected to VDDQ through 3.5kΩ. Therefore it is recommended to connect it to VSS
through less than 100Ω to make it low.
4. ODT control pin is connected to VSS through 3.5kΩ. Therefore it is recommended to connect it to VDDQ
through less than 100Ω to make it high.
ODT PIN
For option1 case, low input level of ODT pin can select strong (RQ¹⁾ input termination range (175Ω<RQ<350Ω) and
high input level of ODT pin can select weak (RQ²⁾ input termination range (175Ω<RQ<250Ω) with K, K#, D0 to Dn,
BWx# and if ODT pin is on floating condition, it set weak (RQ²⁾ input termination range which ODT pin is connected by
pull-up resistor internally. For option2 case, high input level of ODT pin can select weak (RQ²⁾ input termination
range (175Ω<RQ<250Ω) with D0 to Dn, BWx# and low input level or floating of ODT pin can select disable of the ODT
function.
Integrated Silicon Solution, Inc.- www.issi.com
Rev. B
6
10/02/2014