IS80LV51 Datasheet, PDF (34/43 Pages) Integrated Silicon Solution, Inc – CMOS SINGLE CHIP LOW VOLTAGE 8-BIT MICROCONTROLLER

IS80LV51
IS80LV31
ROM Verification
The on-chip memory can be read out for ROM verification.
The address of the program memory location to be read is
applied to Port 1 and pins P2.3-P2.0. The other pins should
be held at the “Verify” level. The contents of the addressed
locations will be emitted on Port 0. External pullups are
required on Port 0 for this operation. Figure 24 shows the
setup to verify the program memory.
A7-A0
P1
A11-A8
1
1
1
0
0
0
4-6 MHz
P2.3-P2.0
RST
EA
ALE
PSEN
P2.7
P2.6
XTAL1
XTAL2
GND
+ 5V
Vcc
10K x 8
P0
PGM
DATA
Figure 24. ROM Verification
ISSI ^®
34
Integrated Silicon Solution, Inc.
ADVANCE INFORMATION MC018-0A
10/01/98