IS61NP12836 Datasheet, PDF (2/20 Pages) Integrated Silicon Solution, Inc – PIPELINE NO WAIT STATE BUS SRAM

IS61NP12832 IS61NP12836 IS61NP25618
IS61NLP12832 IS61NLP12836 IS61NLP25618
BLOCK DIAGRAM
ISSI ^®
A [0:16] or
A [0:17]
ADDRESS
REGISTER
A2-A16 or A2-A17
MODE
A0-A1
BURST
ADDRESS
COUNTER
A'0-A'1
128Kx32; 128Kx36;
256Kx18
MEMORY ARRAY
K DATA-IN
REGISTER
CLK
CKE
CONTROL
LOGIC K
CE
CE2
CE2
} ^ADV
WE
BWXŸ
(X=a,b,c,d or a,b)
CONTROL
REGISTER
OE
ZZ
DQa0-DQd7 or DQa0-DQb8
DQPa-DQPd
WRITE
ADDRESS
REGISTER
WRITE
ADDRESS
REGISTER
K DATA-IN
REGISTER
CONTROL
LOGIC
32, 36 or 18
K _OUTPUT
REGISTER
BUFFER
2
Integrated Silicon Solution, Inc. — 1-800-379-4774
PRELIMINARY INFORMATION Rev. 00C
11/30/00